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Welcome to the Computer Architecture MCQs Page

Dive deep into the fascinating world of Computer Architecture with our comprehensive set of Multiple-Choice Questions (MCQs). This page is dedicated to exploring the fundamental concepts and intricacies of Computer Architecture, a crucial aspect of GATE CSE Exam. In this section, you will encounter a diverse range of MCQs that cover various aspects of Computer Architecture, from the basic principles to advanced topics. Each question is thoughtfully crafted to challenge your knowledge and deepen your understanding of this critical subcategory within GATE CSE Exam.

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Check out the MCQs below to embark on an enriching journey through Computer Architecture. Test your knowledge, expand your horizons, and solidify your grasp on this vital area of GATE CSE Exam.

Note: Each MCQ comes with multiple answer choices. Select the most appropriate option and test your understanding of Computer Architecture. You can click on an option to test your knowledge before viewing the solution for a MCQ. Happy learning!

Computer Architecture MCQs | Page 8 of 20

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Q71.
A device employing INTR line for device interrupt puts the CALL instruction on the data bus while

a.

INTA is active

b.

HOLD is active

c.

READY is active

d.

None of these

Discuss
Answer: (a).INTA is active
Q72.
In 8085, which of the following modifies the program counter ?

a.

Only PCHL instruction

b.

Only ADD instructions

c.

Only JMP and CALL instructions

d.

All instructions

Discuss
Answer: (d).All instructions
Q73.
The 2' s complement representation of the decimal value - 15 is

a.

1111

b.

11111

c.

111111

d.

10001

Discuss
Answer: (d).10001
Q74.
Sign extension is a step in

a.

floating point multiplication

b.

signed 16 bit integer addition

c.

arithmetic left shift

d.

converting a signed integer from one size to another

Discuss
Answer: (d).converting a signed integer from one size to another
Q75.
In 2' s complement addition, overflow

a.

is flagged whenever there is carry from sign bit addition

b.

cannot occur when a positive value is added to a negative value

c.

is flagged when the carries from sign bit and previous bit match

d.

none of the above

Discuss
Answer: (b).cannot occur when a positive value is added to a negative value
Q76.
In the absolute addressing mode

a.

the operand is inside the instruction

b.

the address of the operand is inside the instruction

c.

the register containing address of the operand is specified inside the instruction

d.

the location of the operand is implicit

Discuss
Answer: (b).the address of the operand is inside the instruction
Q77.
Consider the following multiplexer where 10, 11, 12, 13 are four data input lines selected by two address line combinations A1A0 = 00, 01, 10, 11 respectively and f is the output of the multiplexer. EN is the enable input.
The function f(x, y, z) implemented by the circuit is :

a.

xyz'

b.

xy + z

c.

x + z

d.

None of these

Discuss
Answer: (a).xyz'
Q78.
What are the states of the Auxiliary Carry (AC) and Carry Flag (dCY) after executing the following 8085 program?

MVI L, 5DH
MVI L, 6BH
MOV A, H
ADD L

a.

AC = 0 and CY = 0

b.

AC = 1 and CY = 1

c.

AC = 1 and CY = 0

d.

AC = 0 and CY = 0

Discuss
Answer: (c).AC = 1 and CY = 0
Q79.
The performance of a pipelined processor suffers if

a.

the pipeline stages have different delays

b.

consecutive instructions are dependent on each other

c.

the pipeline stages share hardware resources

d.

all of the above

Discuss
Answer: (d).all of the above
Q80.
Horizontal microprogramming :

a.

does not require use of signal decoders

b.

results in larger sized microinstructions than vertical microprogramming

c.

uses one bit for each control signal

d.

all of the above

Discuss
Answer: (d).all of the above
Page 8 of 20

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