| 191. | In an SR latch made by cross coupling two NAND gates, If both S and R inputs are set to 0, then it will result in |
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Answer: (c).q = 1, q’ = 1
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| 192. | The purpose of latch feedback is? |
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Answer: (c).Uneven propagation
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| 193. | The minimum number of D flip – flops needed to design a mod – 258 counter is |
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Answer: (a).9
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| 194. | A 10 – bit Asynchronous counter is having initial value 0 1 0 0 0 1 1 1 1 1. How many flip flops are complemented at next clock? |
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Answer: (c).6
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| 195. | A sequential circuit is having one input and 2 states; The clock is initially in state A. It remains in the same state as long as (x=0) (i.e., input =0). If the input is 1, it switches to the state B and remains there as long as input is 0. On receiving 1 it switches back to state A. If it is realized with D – FF. what is the expression for D FF? |
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Answer: (c).X’Q + XQ’
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| 196. | How many 3 – to – 8 line decoders with an enable input are needed to construct a 6 – to – 64 line decoder without using any other logic gates? |
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Answer: (c).9
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| 197. | Let the 3 variable function f (a, b, c) = Σ (0, 1, 4, 5,7) is realized with 4x1 mux. The select line S₁ & S₀ are connected with A, B. What will be the connections for data inputs? |
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Answer: (a).1, 0, 1, C
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| 198. | Consider a 3-variable function; f(A, B,C) = S (0, 1, 2, 4). It is realized with a 4x1 multiplexer; select lines S₁ S₀ are taken as B, C. Later it was found that select lines have to be interchanged w.r.t the data line in both terminations, Identify the correct statements. |
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Answer: (d).No need to change any input terminations
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| 199. | Consider a binary channel which has 1 – input and 1 – output initially the input is reproduced at output until two consecutive zero’s are received from then onwards output is the bit – wise complement of input complement continuous until two consecutive 1’s are received at input, from then onwards it repeats the behaviour. What will be the minimum number of states in this binary channel. |
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Answer: (b).4
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| 200. | A sequence machine is supposed to receive block of 0’s & 1’s the correct operation required 1’s, number of 1’s in 1st block must be odd and number of 0’s in 0’s block must be even. Any violation indicated by machine outputs 1 against 1st bit of opposite block. What will be minimum number of states in the sequence machine? |
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Answer: (c).4
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