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Welcome to the Computer Architecture MCQs Page

Dive deep into the fascinating world of Computer Architecture with our comprehensive set of Multiple-Choice Questions (MCQs). This page is dedicated to exploring the fundamental concepts and intricacies of Computer Architecture, a crucial aspect of GATE CSE Exam. In this section, you will encounter a diverse range of MCQs that cover various aspects of Computer Architecture, from the basic principles to advanced topics. Each question is thoughtfully crafted to challenge your knowledge and deepen your understanding of this critical subcategory within GATE CSE Exam.

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Check out the MCQs below to embark on an enriching journey through Computer Architecture. Test your knowledge, expand your horizons, and solidify your grasp on this vital area of GATE CSE Exam.

Note: Each MCQ comes with multiple answer choices. Select the most appropriate option and test your understanding of Computer Architecture. You can click on an option to test your knowledge before viewing the solution for a MCQ. Happy learning!

Computer Architecture MCQs | Page 4 of 20

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Q31.
The minimum number of JK flip-flops required to construct a synchronous counter with the count sequence (0, 0, 1, 1, 2, 2, 3, 3, 0, 0,...) is ________.

a.

0

b.

1

c.

2

d.

3

Discuss
Answer: (d).3
Q32.
The number of min-terms after minimizing the following Boolean expression is _________.

[D′ + AB′ + A′C + AC′D + A′C′D]′

a.

1

b.

2

c.

3

d.

4

Discuss
Answer: (a).1
Q33.
A half adder is implemented with XOR and AND gates. A full adder is implemented with two half adders and one OR gate. The propagation delay of an XOR gate is twice that of an AND/OR gate. The propagation delay of an AND/OR gate is 1.2 microseconds. A 4-bit ripple-carry binary adder is implemented by using full adders. The total propagation time of this 4-bit binary adder in microseconds is

a.

19.2 microseconds

b.

18.0 microseconds

c.

12.3 microseconds

d.

16.6 microseconds

Discuss
Answer: (a).19.2 microseconds
Q34.
The total number of prime implicants of the function f(w, x, y, z) = Σ(0, 2, 4, 5, 6, 10) is ________.

a.

2

b.

3

c.

4

d.

5

Discuss
Answer: (b).3
Q35.
Given the function F = P′ + QR, where F is a function in three Boolean variables P, Q and R and P′ = !P, consider the following statements.

S1: F = Σ (4, 5, 6)
S2: F = Σ (0, 1, 2, 3, 7)
S3: F = Π (4, 5, 6)
S4: F = Π (0, 1, 2, 3, 7)

Which of the following is true?

a.

S1-False, S2-True, S3-True, S4-False

b.

S1-True, S2-False, S3-False, S4-True

c.

S1-False, S2-False, S3-True, S4-True

d.

S1-True, S2-True, S3-False, S4-False

Discuss
Answer: (a).S1-False, S2-True, S3-True, S4-False
Q36.
What is the minimum number of NAND gates required to implement a 2-input EXCLUSIVE-OR function without using any other logic gate?

a.

3

b.

4

c.

5

d.

6

Discuss
Answer: (b).4
Q37.
Using a 4-bit 2’s complement arithmetic, which of the following additions will result in an overflow? (i) 1100 + 1100 (ii) 0011 + 0111 (iii) 1111 + 0111

a.

(i) only

b.

(ii) only

c.

(iii) only

d.

(i) and (iii) only

Discuss
Answer: (b).(ii) only
Q38.
The number (123456)8 is equivalent to

a.

(A72E)16 and (22130232)4

b.

(A72E)16 and (22131122)4

c.

(A73E)16 and (22130232)4

d.

(A62E)16 and (22120232)4

Discuss
Answer: (a).(A72E)16 and (22130232)4
Q39.
The function AB’C + A’BC + ABC’ + A’B’C + AB’C’ is equivalent to

a.

AC’+AB+A’C

b.

AB’+AC’+A’C

c.

A’B+AC’+AB'

d.

A’B+AC+AB'

Discuss
Answer: (b).AB’+AC’+A’C
Q40.
Which of the following expressions is equivalent to (A⊕B)⊕C

a.

(A+B+C)(A¯+B¯+C¯)

b.

(A+B+C)(A¯+B¯+C)

c.

ABC+A¯(B⊕C)+B¯(A⊕C)

d.

None of the above

Discuss
Answer: (c).ABC+A¯(B⊕C)+B¯(A⊕C)
Page 4 of 20

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