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Welcome to the Computer Architecture MCQs Page

Dive deep into the fascinating world of Computer Architecture with our comprehensive set of Multiple-Choice Questions (MCQs). This page is dedicated to exploring the fundamental concepts and intricacies of Computer Architecture, a crucial aspect of GATE CSE Exam. In this section, you will encounter a diverse range of MCQs that cover various aspects of Computer Architecture, from the basic principles to advanced topics. Each question is thoughtfully crafted to challenge your knowledge and deepen your understanding of this critical subcategory within GATE CSE Exam.

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Check out the MCQs below to embark on an enriching journey through Computer Architecture. Test your knowledge, expand your horizons, and solidify your grasp on this vital area of GATE CSE Exam.

Note: Each MCQ comes with multiple answer choices. Select the most appropriate option and test your understanding of Computer Architecture. You can click on an option to test your knowledge before viewing the solution for a MCQ. Happy learning!

Computer Architecture MCQs | Page 12 of 20

Q111.
Which of the following register processors used for fetch and execute operations?
1) Program counter
2) Instruction register
3) Address register
Discuss
Answer: (b).1 and 2
Q112.
Microinstruction length is determined by ………………..

1) The maximum number of simultaneous micro-operations that must be specified
2) The way in which the control information is represented or encoded
3) The way in which the next microinstruction address is specified
Discuss
Answer: (d).All of the above
Q113.
ID catching system, the memory reference made in any short time integral tends to use only a small fraction of the total memory?
Discuss
Answer: (b).Locality principle
Discuss
Answer: (b).The Width of a CPU register
Q115.
The register which holds the address of the locating to or from which data are to be transferred is known as
Discuss
Answer: (c).Memory address register
Q116.
Which one is required while establishing the communication link between CPU and peripherals?
Discuss
Answer: (d).Memory data register
Q117.
Which of the following data transfer modes takes relatively more time?
Discuss
Answer: (c).Programmed I/O
Q118.
Halt operation comes under ………
Discuss
Answer: (b).Control transfer
Discuss
Answer: (d).All of the above
Q120.
In four – address instruction format, the number of bytes required to encode an instruction is (assume each address requires 24 bits, and 1 byte is required for operation code)
Discuss
Answer: (b).13

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