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Welcome to the Computer Architecture MCQs Page

Dive deep into the fascinating world of Computer Architecture with our comprehensive set of Multiple-Choice Questions (MCQs). This page is dedicated to exploring the fundamental concepts and intricacies of Computer Architecture, a crucial aspect of GATE CSE Exam. In this section, you will encounter a diverse range of MCQs that cover various aspects of Computer Architecture, from the basic principles to advanced topics. Each question is thoughtfully crafted to challenge your knowledge and deepen your understanding of this critical subcategory within GATE CSE Exam.

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Check out the MCQs below to embark on an enriching journey through Computer Architecture. Test your knowledge, expand your horizons, and solidify your grasp on this vital area of GATE CSE Exam.

Note: Each MCQ comes with multiple answer choices. Select the most appropriate option and test your understanding of Computer Architecture. You can click on an option to test your knowledge before viewing the solution for a MCQ. Happy learning!

Computer Architecture MCQs | Page 16 of 20

Q151.
What is the value of counter after 3 clock pulses?

Q₂ Q₁ Q₀: 0 1 1
Discuss
Answer: (d).1 1 0
Q152.
Consider the following circuit involving a positive edge triggered DFF. Consider the following timing diagram. Let Aᵢ
represents the logic level on the line a in the i-th clock period.

Let A′ represent the compliment of A. The correct output sequence on Y over the clock periods 1 through 5 is:
Discuss
Answer: (a).A₀A₁A′₁A₃A₄
Q153.
Consider the following circuit. The flip – flops are positive edge triggered D FFs. Each state is designated as a two bit string Q₀ Q₁. Let the initial state be 00. The state transition sequence is

a.

A

b.

B

c.

C

d.

D

Discuss
Answer: (d).D
Q154.
In the sequential circuit shown below, If the initial value of the output Q₁Q₀ is 00, what are the next four values of Q₁Q₀ ?
Discuss
Answer: (a).11, 10, 01, 00
Q155.
Consider the following state table. What will be the minimum length of input required to table the machine into state ‘C’?

a.

1

b.

2

c.

3

d.

4

Discuss
Answer: (b).2
Q156.
The Boolean expression for the output f of the multiplex shown below is

a.

A

b.

B

c.

C

d.

D

Discuss
Answer: (b).B
Q157.
Using the select lines; what is the function represented by the following multiplexer?
Discuss
Answer: (a).C
Q158.
Consider the combination of multiplexers with inputs A, B and select lines A, C. What is the expression can be obtained from the combinational circuit?
Discuss
Answer: (a).AC+BC
Q159.
Consider the decoder with 3 inputs A, B, C. Find out the function from the decoder circuit and the function is free from which variable?
Discuss
Answer: (b).B
Q160.
Consider the following multiplexer. Using the select lines, what is the function represented by the mux?
Discuss
Answer: (b).XYZ’

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