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Welcome to the Computer Architecture MCQs Page

Dive deep into the fascinating world of Computer Architecture with our comprehensive set of Multiple-Choice Questions (MCQs). This page is dedicated to exploring the fundamental concepts and intricacies of Computer Architecture, a crucial aspect of GATE CSE Exam. In this section, you will encounter a diverse range of MCQs that cover various aspects of Computer Architecture, from the basic principles to advanced topics. Each question is thoughtfully crafted to challenge your knowledge and deepen your understanding of this critical subcategory within GATE CSE Exam.

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Check out the MCQs below to embark on an enriching journey through Computer Architecture. Test your knowledge, expand your horizons, and solidify your grasp on this vital area of GATE CSE Exam.

Note: Each MCQ comes with multiple answer choices. Select the most appropriate option and test your understanding of Computer Architecture. You can click on an option to test your knowledge before viewing the solution for a MCQ. Happy learning!

Computer Architecture MCQs | Page 2 of 20

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Q11.
In a look-ahead carry generator, the carry generate function Gi and the carry propagate function Pi for inputs Ai and Bi are given by:

Pi = Ai ⨁ Bi and Gi = AiBi

The expressions for the sum bit Si and the carry bit Ci+1 of the look-ahead carry adder are given by:

Si = Pi ⨁ Ci and Ci+1 = Gi + PiCi , where C0 is the input carry.

Consider a two-level logic implementation of the look-ahead carry generator. Assume that all Pi and Gi are available for the carry generator circuit and that the AND and OR gates can have any number of inputs. The number of AND gates and OR gates needed to implement the look-ahead carry generator for a 4-bit adder with S3, S2, S1, S0 and C4 as its outputs are respectively:

a.

6, 3

b.

10, 4

c.

6, 4

d.

10, 5

Discuss
Answer: (b).10, 4
Q12.
Let k = 2^n. A circuit is built by giving the output of an n-bit binary counter as input to an n-to-2^n bit decoder. This circuit is equivalent to a

a.

k-bit binary up counter

b.

k-bit binary down counter

c.

k-bit ring counter

d.

k-bit Johnson counter

Discuss
Answer: (c).k-bit ring counter
Q13.
Consider the equation (123)5 = (x8)y with x and y as unknown. The number of possible solutions is _____ .

a.

1

b.

2

c.

3

d.

4

Discuss
Answer: (c).3
Q14.
Consider the following combinational function block involving four Boolean variables x, y, a, b where x, a, b are inputs and y is the output.

f (x, y, a, b)
{
if (x is 1) y = a;
else y = b;
}

Which one of the following digital logic blocks is the most suitable for implementing this function?

a.

Full adder

b.

Priority encoder

c.

Multiplexer

d.

Flip-flop

Discuss
Answer: (c).Multiplexer
Q15.
Let X denote the Exclusive OR (XOR) operation. Let ‘1’ and ‘0’ denote the binary constants. Consider the following Boolean expression for F over two variables P and Q:

F(P, Q) = ( ( 1 X P) X (P X Q) ) X ( (P X Q) X (Q X 0) )

The equivalent expression for F is

a.

P + Q

b.

(P + Q)'

c.

P X Q

d.

(P X Q)'

Discuss
Answer: (d).(P X Q)'
Q16.
Consider a Boolean function f (w, x, y, z). suppose that exactly one of its inputs is allowed to change at a time. If the function happens to be true for two input vectors i1 = (w1, x1, y1, z1) and i2 = (w2, x2, y2, z2) we would like the function to remain true as the input changes from i1 to i2 (i1 and i2 differ in exactly one bit position), without becoming false momentarily. Let f (w, x, y, z) = ∑(5,7,11,12,13,15). Which of the following cube covers of f will ensure that the required property is satisfied?

a.

w'xz, wxy', xy'z, xyz,wyz

b.

wxy,w'xz,wyz

c.

wx(yz)', xz, wx'yz

d.

wzy, wyz, wxz, w'xz, xy'z, xyz

Discuss
Answer: (a).w'xz, wxy', xy'z, xyz,wyz
Q17.
The hexadecimal representation of 6578 is

a.

1AF

b.

D78

c.

D71

d.

32F

Discuss
Answer: (a).1AF
Q18.
The switching expression corresponding to f(A, B, C, D) = Σ (1, 4, 5, 9, 11, 12) is

a.

BC'D' + A'C'D + AB'D

b.

ABC' + ACD + B'C'D

c.

ACD' + A'BC' + AC'D'

d.

A'BD + ACD' + BCD'

Discuss
Answer: (a).BC'D' + A'C'D + AB'D
Q19.
The Boolean function x'y' + xy + x'y is equivalent to

a.

x' + y'

b.

x + y

c.

x + y'

d.

x' + y

Discuss
Answer: (d).x' + y
Q20.
In an SR latch made by cross-coupling two NAND gates, if both S and R inputs are set to 0, then it will result in

a.

Q = 0, Q' = 1

b.

Q = 1, Q' = 0

c.

Q = 1, Q' = 1

d.

Indeterminate states

Discuss
Answer: (d).Indeterminate states
Page 2 of 20

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