Computer Architecture Multiple choice Questions and Answers-Computer Architecture Basics

11.	The I/O interface required to connect the I/O device to the bus consists of ______
a.	Address decoder and registers
b.	Control circuits
c.	Both a and b
d.	Only b

Answer: (c).Both a and b

12.	To reduce the memory access time we generally make use of ______ .
a.	Heaps
b.	Higher capacity RAM’s
c.	SDRAM’s
d.	Cache’s

Answer: (d).Cache’s

13.	______ is generally used to increase the apparent size of physical memory .
a.	Secondary memory
b.	Virtual memory
c.	Hard-disk
d.	Disks

Answer: (b).Virtual memory

Answer: (b).Memory Function Complete.

15.	The time delay between two successive initiation of memory operation _______ .
a.	Memory access time
b.	Memory search time
c.	Memory cycle time
d.	Instruction delay

Answer: (c).Memory cycle time

16.	The decoded instruction is stored in ______ .
a.	IR
b.	PC
c.	Registers
d.	MDR

Answer: (a).IR

17.	The instruction -> Add LOCA,R0 does,
a.	Adds the value of LOCA to R0 and stores in the temp register
b.	Adds the value of R0 to the address of LOCA
c.	Adds the values of both LOCA and R0 and stores it in R0
d.	Adds the value of LOCA with a value in accumulator and stores it in R0

Answer: (c).Adds the values of both LOCA and R0 and stores it in R0

18.	Which registers can interact with the secondary storage ?
a.	MAR
b.	PC
c.	IR
d.	R0

Answer: (a).MAR

19.	During the execution of a program which gets initialized first ?
a.	MDR
b.	IR
c.	PC
d.	MAR

Answer: (c).PC

20.	Which of the register/s of the processor is/are connected to Memory Bus ?
a.	PC
b.	MAR
c.	IR
d.	Both a and b

Answer: (b).MAR