1. Memory management on a multiprocessor must deal with all of found on
a. Uniprocessor Computer
b. Computer
c. Processor
d. System
Answer: (a).Uniprocessor Computer

2. In a multi-processor configuration two coprocessors are connected to host 8086 processor. The instruction sets of the two coprocessors
a. must be same
b. may overlap
c. must be disjoint
d. must be the same as that of host
Answer: (d).must be the same as that of host

3. The feature of multimicroprocessor architecture is
a. task dependent
b. single bus provider for many processors
c. design is for a specific task
d. all of the mentioned
Answer: (d).all of the mentioned

4. The main objective in building the multimicroprocessor is
a. greater throughput
b. enhanced fault tolerance
c. greater throughput and enhanced fault tolerance
d. none of the mentioned
Answer: (c).greater throughput and enhanced fault tolerance

5. An interface between the user or an application program, and the system resources is
a. microprocessor
b. microcontroller
c. multimicroprocessor
d. operating system
Answer: (d).operating system

6. A multiprocessor operating system should perform
a. a mechanism to split a task into concurrent subtasks
b. optimise the system performance
c. handling structural or architectural changes
d. all of the mentioned
Answer: (d).all of the mentioned

7. Zero address instruction format is used for
a. RISC architecture
b. CISC architecture
c. Von-Neuman architecture
d. Stack-organized architecture
Answer: (d).Stack-organized architecture

8. If no node having a copy of a cache block, this technique is known as
a. Uniform memory access
b. Cached
c. Un-cached
d. Commit
Answer: (c).Un-cached

9. A processor that continuously tries to acquire the locks, spinning around a loop till it reaches its success, is known as
a. Spin locks
b. Store locks
c. Link locks
d. Store operational
Answer: (a).Spin locks

10. The straight-forward model used for the memory consistency, is called
a. Sequential consistency
b. Random consistency
c. Remote node
d. Host node
Answer: (a).Sequential consistency

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