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Welcome to the Digital Components MCQs Page

Dive deep into the fascinating world of Digital Components with our comprehensive set of Multiple-Choice Questions (MCQs). This page is dedicated to exploring the fundamental concepts and intricacies of Digital Components, a crucial aspect of Computer Architecture. In this section, you will encounter a diverse range of MCQs that cover various aspects of Digital Components, from the basic principles to advanced topics. Each question is thoughtfully crafted to challenge your knowledge and deepen your understanding of this critical subcategory within Computer Architecture.

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Check out the MCQs below to embark on an enriching journey through Digital Components. Test your knowledge, expand your horizons, and solidify your grasp on this vital area of Computer Architecture.

Note: Each MCQ comes with multiple answer choices. Select the most appropriate option and test your understanding of Digital Components. You can click on an option to test your knowledge before viewing the solution for a MCQ. Happy learning!

Digital Components MCQs | Page 5 of 12

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Q41.
The number of control lines for 32 to 1 multiplexer is

a.

4

b.

5

c.

16

d.

6

Discuss
Answer: (b).5
Q42.
The logic 0 level of a CMOS logic device is approximately
Discuss
Answer: (d).0 volts
Q43.
How many select lines will a 32:1 multiplexer will have

a.

5

b.

8

c.

9

d.

11

Discuss
Answer: (a).5
Q44.
Which of following consume minimum power?
Discuss
Answer: (b).CMOS
Q45.
ABCD - seven segment decoder / driver in connected to an LED display. Which segments are illuminated for the input code DCBA = 0001.
Discuss
Answer: (a).b, c
Q46.
How many flip-flops are required to produce a divide-by-32 device?

a.

4

b.

6

c.

5

d.

7

Discuss
Answer: (c).5
Q47.
A demultiplexer can be used as
Discuss
Answer: (b).Decoder
Q48.
'n' Flip flops will divide the clock frequency by a factor of
Discuss
Answer: (b).n
Q49.
If the clock input applied to a cascaded Mod-6 & Mod-4 counter is 48KHz. Than the output of the cascaded arrangement shall be of
Discuss
Answer: (c).2 KHz
Q50.
Logic gates with a set of input and outputs is arrangement of
Discuss
Answer: (a).Combinational circuit

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