41. The number of control lines for 32 to 1 multiplexer is
a. 4
b. 5
c. 16
d. 6
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Answer: (b).5

42. The logic 0 level of a CMOS logic device is approximately
a. 1.2 volts
b. 0.4 volts
c. 5 volts
d. 0 volts
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Answer: (d).0 volts

43. How many select lines will a 32:1 multiplexer will have
a. 5
b. 8
c. 9
d. 11
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Answer: (a).5

44. Which of following consume minimum power?
a. TTL
b. CMOS
c. DTL
d. RTL
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Answer: (b).CMOS

45. ABCD - seven segment decoder / driver in connected to an LED display. Which segments are illuminated for the input code DCBA = 0001.
a. b, c
b. c, b
c. a, b, c
d. a, b, c, d
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Answer: (a).b, c

46. How many flip-flops are required to produce a divide-by-32 device?
a. 4
b. 6
c. 5
d. 7
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Answer: (c).5

47. A demultiplexer can be used as
a. Encoder
b. Decoder
c. Multiplexer
d. None of the above
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Answer: (b).Decoder

48. 'n' Flip flops will divide the clock frequency by a factor of
a. n^2
b. n
c. 2^n
d. log (n)
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Answer: (b).n

49. If the clock input applied to a cascaded Mod-6 & Mod-4 counter is 48KHz. Than the output of the cascaded arrangement shall be of
a. 4.8 KHz
b. 12 KHz
c. 2 KHz
d. 8 KHz
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Answer: (c).2 KHz

50. Logic gates with a set of input and outputs is arrangement of
a. Combinational circuit
b. Logic circuit
c. Design circuits
d. Register
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Answer: (a).Combinational circuit

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