31. The A/D converter whose conversion time is independent of the number of bits is
a. Dual slope
b. Counter type
c. Parallel conversion
d. Successive approximation
Answer: (c).Parallel conversion

32. A 4-bit synchronous counter uses flip-flops with propagation delay times of 15 ns each. The maximum possible time required for change of state will be
a. 15 ns
b. 30 ns
c. 45 ns
d. 60 ns
Answer: (a).15 ns

33. Words having 8-bits are to be stored into computer memory. The number of lines required for writing into memory are
a. 1
b. 2
c. 4
d. 8
Answer: (d).8

34. In successive-approximation A/D converter, offset voltage equal to 1/2 LSB is added to the D/A converter’s output. This is done to
a. Improve the speed of operation.
b. Reduce the maximum quantization error.
c. Increase the number of bits at the output.
d. Increase the range of input voltage that can be converted.
Answer: (b).Reduce the maximum quantization error.

35. How many flip flops are required to construct a decade counter
a. 10
b. 3
c. 4
d. 2
Answer: (c).4

36. Which TTL logic gate is used for wired ANDing
a. Open collector output
b. Totem Pole
c. Tri state output
d. ECL gates
Answer: (a).Open collector output

37. The MSI chip 7474 is
a. Dual edge triggered JK flip-flop (TTL)
b. Dual edge triggered D flip-flop (CMOS)
c. Dual edge triggered D flip-flop (TTL)
d. Dual edge triggered JK flip-flop (CMOS)
Answer: (c).Dual edge triggered D flip-flop (TTL)

38. When the set of input data to an even parity generator is 0111, the output will be
a. 1
b. 0
c. Unpredictable
d. Depends on the previous input
Answer: (b).0

39. How many flip-flops are required to construct mod 30 counter
a. 5
b. 6
c. 4
d. 8
Answer: (a).5

40. The number of control lines for 16 to 1 multiplexer is
a. 2
b. 4
c. 3
d. 5
Answer: (b).4

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