adplus-dvertising

Welcome to the Digital Components MCQs Page

Dive deep into the fascinating world of Digital Components with our comprehensive set of Multiple-Choice Questions (MCQs). This page is dedicated to exploring the fundamental concepts and intricacies of Digital Components, a crucial aspect of Computer Architecture. In this section, you will encounter a diverse range of MCQs that cover various aspects of Digital Components, from the basic principles to advanced topics. Each question is thoughtfully crafted to challenge your knowledge and deepen your understanding of this critical subcategory within Computer Architecture.

frame-decoration

Check out the MCQs below to embark on an enriching journey through Digital Components. Test your knowledge, expand your horizons, and solidify your grasp on this vital area of Computer Architecture.

Note: Each MCQ comes with multiple answer choices. Select the most appropriate option and test your understanding of Digital Components. You can click on an option to test your knowledge before viewing the solution for a MCQ. Happy learning!

Digital Components MCQs | Page 4 of 12

Q31.
The A/D converter whose conversion time is independent of the number of bits is
Discuss
Answer: (c).Parallel conversion
Q32.
A 4-bit synchronous counter uses flip-flops with propagation delay times of 15 ns each. The maximum possible time required for change of state will be
Discuss
Answer: (a).15 ns
Q33.
Words having 8-bits are to be stored into computer memory. The number of lines required for writing into memory are

a.

1

b.

2

c.

4

d.

8

Discuss
Answer: (d).8
Q34.
In successive-approximation A/D converter, offset voltage equal to 1/2 LSB is added to the D/A converter’s output. This is done to
Discuss
Answer: (b).Reduce the maximum quantization error.
Q35.
How many flip flops are required to construct a decade counter

a.

10

b.

3

c.

4

d.

2

Discuss
Answer: (c).4
Q36.
Which TTL logic gate is used for wired ANDing
Discuss
Answer: (a).Open collector output
Discuss
Answer: (c).Dual edge triggered D flip-flop (TTL)
Q38.
When the set of input data to an even parity generator is 0111, the output will be
Discuss
Answer: (b).0
Q39.
How many flip-flops are required to construct mod 30 counter

a.

5

b.

6

c.

4

d.

8

Discuss
Answer: (a).5
Q40.
The number of control lines for 16 to 1 multiplexer is

a.

2

b.

4

c.

3

d.

5

Discuss
Answer: (b).4
Page 4 of 12

Suggested Topics

Are you eager to expand your knowledge beyond Computer Architecture? We've curated a selection of related categories that you might find intriguing.

Click on the categories below to discover a wealth of MCQs and enrich your understanding of Computer Science. Happy exploring!