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Welcome to the Computer Architecture MCQs Page

Dive deep into the fascinating world of Computer Architecture with our comprehensive set of Multiple-Choice Questions (MCQs). This page is dedicated to exploring the fundamental concepts and intricacies of Computer Architecture, a crucial aspect of UGC CBSE NET Exam. In this section, you will encounter a diverse range of MCQs that cover various aspects of Computer Architecture, from the basic principles to advanced topics. Each question is thoughtfully crafted to challenge your knowledge and deepen your understanding of this critical subcategory within UGC CBSE NET Exam.

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Check out the MCQs below to embark on an enriching journey through Computer Architecture. Test your knowledge, expand your horizons, and solidify your grasp on this vital area of UGC CBSE NET Exam.

Note: Each MCQ comes with multiple answer choices. Select the most appropriate option and test your understanding of Computer Architecture. You can click on an option to test your knowledge before viewing the solution for a MCQ. Happy learning!

Computer Architecture MCQs | Page 5 of 16

Q41.
Which of the following is an interrupt according to temporal relationship with system clock?
Discuss
Answer: (d).Synchronous interrupt
Q42.
The general configuration of the microprogrammed control unit is given below. What are blocks B and C in the diagram respectively?
Discuss
Answer: (b).Control address register and control memory
Q43.
Match the following:

Addressing Mode      Location of operand
a. Implied                      i. Registers which are in CPU
b. Immediate                 ii. Register specifies the address
of the operand
c. Register                     iii. Specified in the register
d. Register Indirect      iv. Specified implicitly in the
definition of instruction

Codes:
     a   b   c  d
Discuss
Answer: (a).iv  iii   i   ii
Q44.
In 8085 microprocessor, the digit 5 indicates that the microprocessor needs
Discuss
Answer: (b).+5 volts supply only
Q45.
In 8085, which of the following performs: load register pair immediate operation?
Discuss
Answer: (c).LXI rp, data
Q46.
The content of the accumulator after the execution of the following 8085 assembly language program, is

MVI A, 35H
MOV B, A
STC
CMC
RAR
XRA B
Discuss
Answer: (d).2FH
Discuss
Answer: (b).Asynchronous counter
Q48.
8085 microprocessor has ............... bit ALU.
Discuss
Answer: (c).8
Q49.
The register that stores the bits required to mask the interrupts is ................
Discuss
Answer: (c).Interrupt mask register
Q50.
Which of the following in 8085 microprocessor performs

HL = HL + HL ?
Discuss
Answer: (b).DAD H
Page 5 of 16

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