Welcome to the Computer Architecture MCQs Page

Dive deep into the fascinating world of Computer Architecture with our comprehensive set of Multiple-Choice Questions (MCQs). This page is dedicated to exploring the fundamental concepts and intricacies of Computer Architecture, a crucial aspect of UGC CBSE NET Exam. In this section, you will encounter a diverse range of MCQs that cover various aspects of Computer Architecture, from the basic principles to advanced topics. Each question is thoughtfully crafted to challenge your knowledge and deepen your understanding of this critical subcategory within UGC CBSE NET Exam.


Check out the MCQs below to embark on an enriching journey through Computer Architecture. Test your knowledge, expand your horizons, and solidify your grasp on this vital area of UGC CBSE NET Exam.

Note: Each MCQ comes with multiple answer choices. Select the most appropriate option and test your understanding of Computer Architecture. You can click on an option to test your knowledge before viewing the solution for a MCQ. Happy learning!

Computer Architecture MCQs | Page 1 of 16

In which addressing mode, the effective address of the operand is generated by adding a constant value to the contents of register ?
Answer: (d).Index
The efficiency (E) and speed up (sp) for Multiprocessor with p processors satisfies
Answer: (b).E  ≤ 1 and  Sp  ≤  p
In an enhancement of a CPU design, the speed of a floating point unit has been increased by 20% and the speed of a fixed point unit has been increased by 10%. What is the overall speed achieved if the ratio of the number of floating point operations to the number of fixed point operations is 2 : 3 and the floating point operation used to take twice the time taken by the fixed point operation in original design ?
Answer: (a).1.62
Suppose a processor does not have any stack pointer registers, which of the following statements is true ?
Answer: (d).All subroutine calls and interrupts are possible
Let f be the fraction of a computation (in terms of time) that is parallelizable, P the number of processors in the system, and sp the speed up achievable in comparison with sequential execution – then the sp can be calculated using the relation :
Answer: (c).1/ (1 - f + (f/P))
Answer: (a).Number of components that can call or pass control to component A
Which of the following statements are true? 

I. A circuit that adds two bits, producing a sum bit and a carry bit is called half adder.

II. A circuit that adds two bits, producing a sum bit and a carry bit is called full adder.

III. A circuit that adds two bits and a carry bit producing a sum bit and a carry bit is called full adder.

IV. A device that accepts the value of a Boolean variable as input and produces its complement is called an inverter.
Answer: (d).I, III & IV
Match the following:

List -I                List - II
a. Indexed          i. is not used when an
Addressing          operand is moved from memory into a register' or from a  register to memory.
b. Direct              ii.Memory address is computed by adding up two registers plus an (optional) offset.
c. Register         iii.Addressing memory  by giving a register plus a content offset.
d. Base-             iv .can only be used to access global variables whose address 18 known at compile time. Indexed
Answer: (c).(a)-(iii), (b)-(iv),(c)-(i),(d)-(ii)
Answer: (d).All of these
Synchronization is achieved by a __________timing device which generates a periodic train of ____________
Answer: (a).clock generator, clock pulse
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