1. | In which addressing mode, the effective address of the operand is generated by adding a constant value to the contents of register ? |
a. | Absolute |
b. | Indirect |
c. | Immediate |
d. | Index |
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Answer: (d).Index
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2. | The efficiency (E) and speed up (sp) for Multiprocessor with p processors satisfies |
a. | E ≤ Sp and Sp ≤ p |
b. | E ≤ 1 and Sp ≤ p |
c. | E ≤ p and Sp ≤ 1 |
d. | E ≤ 1 and Sp ≤ 1 |
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Answer: (b).E ≤ 1 and Sp ≤ p
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3. | In an enhancement of a CPU design, the speed of a floating point unit has been increased by 20% and the speed of a fixed point unit has been increased by 10%. What is the overall speed achieved if the ratio of the number of floating point operations to the number of fixed point operations is 2 : 3 and the floating point operation used to take twice the time taken by the fixed point operation in original design ? |
a. | 1.62 |
b. | 1.55 |
c. | 1.85 |
d. | 1.285 |
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Answer: (a).1.62
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4. | Suppose a processor does not have any stack pointer registers, which of the following statements is true ? |
a. | It cannot have subroutine call instruction |
b. | It cannot have nested subroutine calls |
c. | Interrupts are not possible |
d. | All subroutine calls and interrupts are possible |
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Answer: (d).All subroutine calls and interrupts are possible
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5. | Let f be the fraction of a computation (in terms of time) that is parallelizable, P the number of processors in the system, and sp the speed up achievable in comparison with sequential execution – then the sp can be calculated using the relation : |
a. | 1 /(1 - f - (f/P)) |
b. | P/ P - f(P + 1) |
c. | 1/ (1 - f + (f/P)) |
d. | P /(P + f(P - 1)) |
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Answer: (c).1/ (1 - f + (f/P))
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6. | FAN IN of a component A is defined as |
a. | Number of components that can call or pass control to component A |
b. | Number of components that are called by component A |
c. | Number of components related to component A |
d. | Number of components dependent on component A |
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Answer: (a).Number of components that can call or pass control to component A
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7. | Which of the following statements are true? I. A circuit that adds two bits, producing a sum bit and a carry bit is called half adder. II. A circuit that adds two bits, producing a sum bit and a carry bit is called full adder. III. A circuit that adds two bits and a carry bit producing a sum bit and a carry bit is called full adder. IV. A device that accepts the value of a Boolean variable as input and produces its complement is called an inverter. |
a. | I & II |
b. | Il & III |
c. | I, II, lll |
d. | I, III & IV |
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Answer: (d).I, III & IV
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8. | Match the following: List -I List - II a. Indexed i. is not used when an Addressing operand is moved from memory into a register' or from a register to memory. b. Direct ii.Memory address is computed by adding up two registers plus an (optional) offset. Addressing c. Register iii.Addressing memory by giving a register plus a content offset. Addressing d. Base- iv .can only be used to access global variables whose address 18 known at compile time. Indexed Addressing |
a. | (a) - (ii), (b)-(i),(c)-(iv), (d)-(iii) |
b. | (a)-(ii),(b)-(iv), (c)-(i), (d)-(iii) |
c. | (a)-(iii), (b)-(iv),(c)-(i),(d)-(ii) |
d. | (a)-(iii),(b)-(i),(c)-(iv), (d)-(ii) |
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Answer: (c).(a)-(iii), (b)-(iv),(c)-(i),(d)-(ii)
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9. | Which of the following is a design criteria for instruction formats ? |
a. | The size of instructions |
b. | The number of bits in the address fields |
c. | The sufficient space in the instruction format to express all the operations desired |
d. | All of these |
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Answer: (d).All of these
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10. | Synchronization is achieved by a __________timing device which generates a periodic train of ____________ |
a. | clock generator, clock pulse |
b. | master generator, clock pulse |
c. | generator, clock |
d. | master clock generator, clock pulse |
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Answer: (a).clock generator, clock pulse
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