Q. Let f be the fraction of a computation (in terms of time) that is parallelizable, P the number of processors in the system, and sp the speed up achievable in comparison with sequential execution – then the sp can be calculated using the relation :

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Q. FAN IN of a component A is defined as

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Q. Which of the following statements are true? 

I. A circuit that adds two bits, producing a sum bit and a carry bit is called half adder.

II. A circuit that adds two bits, producing a sum bit and a carry bit is called full adder.

III. A circuit that adds two bits and a carry bit producing a sum bit and a carry bit is called full adder.

IV. A device that accepts the value of a Boolean variable as input and produces its complement is called an inverter.

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Q. Match the following:

List -I                List - II
a. Indexed          i. is not used when an
Addressing          operand is moved from memory into a register' or from a  register to memory.
b. Direct              ii.Memory address is computed by adding up two registers plus an (optional) offset.
Addressing
c. Register         iii.Addressing memory  by giving a register plus a content offset.
Addressing
d. Base-             iv .can only be used to access global variables whose address 18 known at compile time. Indexed
Addressing

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Q. Which of the following is a design criteria for instruction formats ?

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Q. Synchronization is achieved by a __________timing device which generates a periodic train of ____________

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Q. Serial access memories are useful in applications where

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Q. The essential difference between traps and interrupts is

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Q. The size of the ROM required to build an 8-bit adder/subtractor with mode control, carry input, carry output and two's complement overflow output is given as

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Q. A specific editor has 200 K of program text, 15 K of initial stack, 50 K of initialized data, and 70 K of bootstrap code. If five editors are started simultaneously, how much physical memory is needed if shared text is used?

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Q. A hierarchical memory system that uses cache memory has cache access time of 50 nano seconds, main memory access time of 300 nano seconds, 75% of memory requests are for read, hit ratio of 0.8 for read access and the write-through scheme is used. What will be the average access time of the system both for read and write requests ?

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Q. For switching from a CPU user mode to the supervisor mode following type of interrupt is most appropriate

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Q. In a dot matrix printer the time to print a character is 6 m:sec., time to space in between characters is 2 m.sec., and the number of characters ina line are 200. The printing speed of the dot matrix printer in characters per second and the time to print a character line are given by which of the following options?

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Q. Match the following 8085 instructions with the flags:
 
a. XCHG i. only carry flag is affected.

b. SUB ii.  no flags are affected.

c. STC iii. all flags other than carry flag are affected.

d. DCR iv. all flags are affected.

code:
a  b  c   d

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Q. How many times will the following loop be executed?

          LXI    B, 0007 H
LOP: DCX  B 
          MOV  A,B
          ORA  C
          JNZ   LOP

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Q. Specify the contents of the accumulator and the status of the S, Z and CY flags when 8085 microprocessor performs addition of 87 H and 79 H.

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Q. Which of the following statements is not true?

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Q.  Consider the following statements :

(a) Boolean expressions and logic networks correspond to labelled acyclic digraphs.
(b) Optimal Boolean expressions may not correspond to simplest networks.
(c) Choosing essential blocks first in a Karnaugh map and then greedily choosing the largest remaining blocks to cover may not give an optimal expression.
Which of these statement(s) is/ are correct

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Q. Consider a full adder with the following input values :

(a) x=1, y=0 and Ci(carry input) = 0
(b) x=0, y=1 and Ci = 1
Compute the values of S(sum) and C0 (carry output) for the above input values.

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Q. In the case of parallelization, Amdahl's law states that if P is the proportion of the program that can be made parallel and (1 - P) is the proportion that cannot be parallelized , then the maximum speed that can be achieved by using N processors is

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