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Welcome to the 80286 80287 Microprocessor MCQs Page

Dive deep into the fascinating world of 80286 80287 Microprocessor with our comprehensive set of Multiple-Choice Questions (MCQs). This page is dedicated to exploring the fundamental concepts and intricacies of 80286 80287 Microprocessor, a crucial aspect of Microprocessor. In this section, you will encounter a diverse range of MCQs that cover various aspects of 80286 80287 Microprocessor, from the basic principles to advanced topics. Each question is thoughtfully crafted to challenge your knowledge and deepen your understanding of this critical subcategory within Microprocessor.

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Check out the MCQs below to embark on an enriching journey through 80286 80287 Microprocessor. Test your knowledge, expand your horizons, and solidify your grasp on this vital area of Microprocessor.

Note: Each MCQ comes with multiple answer choices. Select the most appropriate option and test your understanding of 80286 80287 Microprocessor. You can click on an option to test your knowledge before viewing the solution for a MCQ. Happy learning!

80286 80287 Microprocessor MCQs | Page 17 of 19

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Q161.
A general protection exception is generated, if the value of

a.

CPL is equal to that of IOPL

b.

CPL is less than that of IOPL

c.

CPL is greater than that of IOPL

d.

None of the mentioned

Discuss
Answer: (c).CPL is greater than that of IOPL
Q162.
While executing the instruction, OUTSW, the SI is incremented by

a.

1

b.

2

c.

3

d.

4

Discuss
Answer: (b).2
Q163.
The instruction that is used to exit the procedure is

a.

QUIT

b.

STOP

c.

LEAVE

d.

EXIT

Discuss
Answer: (c).LEAVE
Q164.
The instruction that determines the number of bytes, to be copied into the new stack frame, from the previous stack is

a.

ENTER

b.

BOUND

c.

CLTS

d.

LEAVE

Discuss
Answer: (a).ENTER
Q165.
The instruction that is used to check whether a signed array offset is within the limit, defined for it by the starting and ending index is

a.

ENTER

b.

BOUND

c.

CLTS

d.

LEAVE

Discuss
Answer: (b).BOUND
Q166.
The CLTS (Clear Task Switch Flag) instruction records every execution of WAIT and ESC and is trapped if the flag(s)

a.

PE (Protection Enable) and TS (task switch) flags are set

b.

Emulate Processor extension flag is set

c.

MP flag and task switched flag is set

d.

PE and MP flag is set

Discuss
Answer: (c).MP flag and task switched flag is set
Q167.
The instruction that determines whether the segment pointed to, by a 16-bit register, can be accessed from the current privilege level is

a.

RPL

b.

CPL

c.

ARPL

d.

VERR

Discuss
Answer: (d).VERR
Q168.
The instruction that loads 6 bytes from a memory block, pointed to by the effective address of the operand, into global descriptor table register is

a.

LLDT

b.

SGDT

c.

LGDT

d.

None of the mentioned

Discuss
Answer: (c).LGDT
Q169.
In LGDT instruction, while loading 6 bytes, the first word is loaded into the field of

a.

LIMIT field

b.

BASE field

c.

Either LIMIT or BASE field

d.

None of the mentioned

Discuss
Answer: (a).LIMIT field
Q170.
Which of the following is not a block of an architecture of 80287?

a.

bus control logic

b.

data interface and control unit

c.

floating point unit

d.

none of the mentioned

Discuss
Answer: (d).none of the mentioned
Page 17 of 19

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