Q. The instruction that determines whether the segment pointed to, by a 16-bit register, can be accessed from the current privilege level is

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Q. The instruction that loads 6 bytes from a memory block, pointed to by the effective address of the operand, into global descriptor table register is

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Q. In LGDT instruction, while loading 6 bytes, the first word is loaded into the field of

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Q. Which of the following is not a block of an architecture of 80287?

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Q. The unit that provides and controls the interface, between the internal 80287 bus and 80286 bus via data buffer is

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Q. The data interface and control unit consists of

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Q. The word that optimizes the NDP performance, by maintaining a record of empty and non-empty register locations is

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Q. The part of the data interface and control unit, that points to the source of exception generated is

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Q. The data bus in a floating point unit is of

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Q. The arrangement of data that is to be shifted successively, whenever required for the execution, is done by

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Q. The word that is used to select one of the processing options, among the provided ones is

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Q. After reset of 80287, the control bit that is initialized to zero is

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Q. The bits that are modified depending upon the result of the execution of arithmetic instructions are

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Q. If the stack flag is set, and condition code bit C1=1, then the stack is

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Q. If the stack flag is set, and condition code bit C1=0, then the stack is

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Q. The bits that affect the result of arithmetic operations like ADD, SUB, MUL, DIV are

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Q. The precision is decided by the

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Q. If Numeric Processor Write (NPWR) active-low input pin is activated, then it enables a data transfer from

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Q. If Numeric Processor Read (NPRD) active-low input pin is activated, then it enables a data transfer from

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Q. Which of the input line(s) indicate that the CPU is performing an escape operation, and enables 80287 to execute the next instruction?

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