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Welcome to the Computer Architecture MCQs Page

Dive deep into the fascinating world of Computer Architecture with our comprehensive set of Multiple-Choice Questions (MCQs). This page is dedicated to exploring the fundamental concepts and intricacies of Computer Architecture, a crucial aspect of UGC CBSE NET Exam. In this section, you will encounter a diverse range of MCQs that cover various aspects of Computer Architecture, from the basic principles to advanced topics. Each question is thoughtfully crafted to challenge your knowledge and deepen your understanding of this critical subcategory within UGC CBSE NET Exam.

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Check out the MCQs below to embark on an enriching journey through Computer Architecture. Test your knowledge, expand your horizons, and solidify your grasp on this vital area of UGC CBSE NET Exam.

Note: Each MCQ comes with multiple answer choices. Select the most appropriate option and test your understanding of Computer Architecture. You can click on an option to test your knowledge before viewing the solution for a MCQ. Happy learning!

Computer Architecture MCQs | Page 11 of 16

Q101.
What is the transitive voltage for the voltage input of a CMOS operating from 10V supply?
Discuss
Answer: (c).5V
Q102.
Identify the logic function performed by the circuit shown
Discuss
Answer: (b).exclusive NOR
Q103.
The highest noise margin is offered by
Discuss
Answer: (b).TTL
Q104.
The characteristic equation of a JK flip flop is:
Discuss
Answer: (b).Qn+1=J.Q’n+K’.Qn
Q105.
In order to implement a n variable switching function, a MUX must have:
Discuss
Answer: (a).2^n inputs
Q106.
A reduced state table has 18 rows. The minimum number of flip flops needed to implement the sequential machine is:

a.

18

b.

9

c.

5

d.

4

Discuss
Answer: (c).5
Q107.
In which addressing mode the operand is given explicitly in the instruction itself?
Discuss
Answer: (b).Immediate mode
Q108.
The characteristic equation of D flip-flop is:
Discuss
Answer: (d).Q=D
Q109.
If 4 input multiplexers drive a 4 input multiplexer, we get a:
Discuss
Answer: (a).16 input MUX
Q110.
In which addressing mode, the effective address of the operand is generated by adding a constant value to the contents of register?
Discuss
Answer: (d).index mode

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