Welcome to the Memory Organization MCQs Page

Dive deep into the fascinating world of Memory Organization with our comprehensive set of Multiple-Choice Questions (MCQs). This page is dedicated to exploring the fundamental concepts and intricacies of Memory Organization, a crucial aspect of Computer Architecture. In this section, you will encounter a diverse range of MCQs that cover various aspects of Memory Organization, from the basic principles to advanced topics. Each question is thoughtfully crafted to challenge your knowledge and deepen your understanding of this critical subcategory within Computer Architecture.

Check out the MCQs below to embark on an enriching journey through Memory Organization. Test your knowledge, expand your horizons, and solidify your grasp on this vital area of Computer Architecture.

Note: Each MCQ comes with multiple answer choices. Select the most appropriate option and test your understanding of Memory Organization. You can click on an option to test your knowledge before viewing the solution for a MCQ. Happy learning!

Memory Organization MCQs | Page 11 of 23

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Q101.

Larger blocks increases the conflict-misses and the capacity-misses, whenever the cache is

Great

Small

Large

Corrupt

Discuss

Answer: (b).Small

Q102.

The page table level that says if page has been modified, is known as

Presence

Read/write

Page size

Dirty

Discuss

Answer: (d).Dirty

Q103.

Data structure, maintaining the addresses of physical-pages, typically takes the form of a

Page size

Page table

Queue

Stack

Discuss

Answer: (b).Page table

Q104.

The matching tag sends the corresponding physical address through effectively a

40:1 multiplexor

20:1 multiplexor

20:2 multiplexor

30:1 multiplexor

Discuss

Answer: (a).40:1 multiplexor

Q105.

For Reducing Miss Rate, using Large blocks', the given statement defines

First Optimization

Second Optimization

Third Optimization

Fourth Optimization

Discuss

Answer: (b).Second Optimization

Q106.

Equivalent to the PTE valid bit, used to indicate the valid translation is refered to as

Base field

Present bit

Access bit

Attributes field

Discuss

Answer: (b).Present bit

Q107.

When the processor gets the requested data items from the cache, it is called a

File caches

Name cache

Cache hit

Registers

Discuss

Answer: (c).Cache hit

Q108.

To provide for protected sharing, half of the address space is shared by all processes and half is unique to each process, called

global address space

Local address space

Address bit

Both a and b

Discuss

Answer: (d).Both a and b

Q109.

The processor's performance can be calculated as

CPU execution time = (CPU clock cycles - Memory stall cycles)

CPU execution time = (CPU clock cycles + Memory stall cycles)

CPU execution time = (CPU clock cycles + Memory stall cycles) - Clock cycle time

CPU execution time = (CPU clock cycles x Memory stall cycles) + Clock cycle time

Discuss

Answer: (b).CPU execution time = (CPU clock cycles + Memory stall cycles)

Q110.

At any instant it is possible to switch from one process to another, this exchange is called a

Process switch

Context switch

Swapping

Both a and b

Discuss

Answer: (d).Both a and b

Page 11 of 23

Welcome to the Memory Organization MCQs Page

Memory Organization MCQs | Page 11 of 23

Explore more Topics under Computer Architecture

Computer Architecture Basics

Digital Logic Circuits

Digital Components

Digital Data Representation

Microoperations

Basic Computer Organization

Pipeline and Vector Processing

Computer Arithmetic

Input Output Organization

Multiprocessors

8085 Microprocessor

Microcontroller

8051 Microcontroller

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