Q. The PCON register consists of

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Q. The on-chip oscillator is stopped in

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Q. In idle mode, the device that is disabled is

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Q. The only way to terminate the power down mode is to

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Q. The idle mode can be terminated by

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Q. Which of the following is an external interrupt?

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Q. The interrupts, INT0(active low) and INT1(active low) are processed internally by flags

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Q. The flags IE0 and IE1, are automatically cleared after the control is transferred to respective vector if the interrupt is

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Q. If the external interrupt sources control the flags IE0 and IE1, then the interrupt programmed is

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Q. The pulses at T0 or T1 pin are counted in

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Q. In timer mode, the oscillator clock is divided by a prescalar

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Q. The serial port interrupt is generated if

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Q. In serial port interrupt, after the control is transferred to the interrupt service routine, the flag that is cleared is

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Q. The atleast number of machine cycles for which the external interrupts that are programmed level-sensitive should remain high is

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Q. If the external interrupts are programmed edge sensitive, then they should remain high for atleast

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Q. The timer generates an interrupt, if the count value reaches to

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Q. The external interrupt that has the lowest priority among the following is

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Q. Among the five interrupts generated by 8051, the lowest priority is given to the interrupt

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Q. Among the five interrupts generated by 8051, the highest priority is given to the interrupt

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Q. All the interrupts are enabled using a special function register called

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