Q. The flags IE0 and IE1, are automatically cleared after the control is transferred to respective vector if the interrupt is

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Q. If the external interrupt sources control the flags IE0 and IE1, then the interrupt programmed is

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Q. The pulses at T0 or T1 pin are counted in

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Q. In timer mode, the oscillator clock is divided by a prescalar

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Q. The serial port interrupt is generated if

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Q. In serial port interrupt, after the control is transferred to the interrupt service routine, the flag that is cleared is

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Q. The atleast number of machine cycles for which the external interrupts that are programmed level-sensitive should remain high is

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Q. If the external interrupts are programmed edge sensitive, then they should remain high for atleast

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Q. The timer generates an interrupt, if the count value reaches to

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Q. The external interrupt that has the lowest priority among the following is

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Q. Among the five interrupts generated by 8051, the lowest priority is given to the interrupt

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Q. Among the five interrupts generated by 8051, the highest priority is given to the interrupt

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Q. All the interrupts are enabled using a special function register called

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Q. The number of bytes stored on the stack during one operation of PUSH or POP is

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Q. The step involved in PUSH operation is

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Q. The step involved in POP operation is

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Q. The 8051 stack is

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Q. After reset, the stack pointer(SP) is initialized to the address of

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Q. The address register for storing the 8-bit addresses can be

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Q. The instruction, ADD A, R7 is an example of

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