Q. How can we calculate the length of the refresh cycle?

View solution

Q. What type of error occurs in the refresh cycle of the DRAM?

View solution

Q. What is the worst case delay of the burst refresh in 4M by 1 DRAM?

View solution

Q. Which refresh techniques depends on the size of time critical code for calculating refresh cycle?

View solution

Q. Which of the following uses a timer for refresh technique?

View solution

Q. What is the main disadvantage in the software refresh of the DRAM?

View solution

Q. Which refresh technique is useful for low power consumption?

View solution

Q. Which refreshing techniques generates a recycled address?

View solution

Q. Which of the following uses a software refresh in the DRAM ?

View solution

Q. How do CBR works?

View solution

Q. Which of the refresh circuit is similar to CBR?

View solution

Q. Which technology is standardized in DRAM for determining the maximum time interval between the refresh cycle?

View solution

Q. In which pin does the data appear in the basic DRAM interfacing?

View solution

Q. What is the duration for memory refresh to remain compatible?

View solution

Q. Which interfacing method lowers the speed of the processor?

View solution

Q. What is EDO RAM?

View solution

Q. What is RDRAM?

View solution

Q. Which of the following can transfer up to 1.6 billion bytes per second?

View solution

Q. Which of the following cycle is larger than the access time?

View solution

Q. Which mode of operation selects an internal page of memory in the DRAM interfacing?

View solution