Q. The 8085 microprocessor responds to the presence of an interrupt

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Q. The most appropriate matching for the following pairs

X: Indirect addressing 1 : Loops

Y: Immediate addressing 2 : Pointers

Z: Auto decrement addressing 3: Constants

is

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Q. Consider the values A = 2.0 x 10^30, B =-2.0 x 10^30, C= 1.0, and the sequence

X: = A + B Y: = A + C
X: = X + C Y: = Y + B

executed on a computer where floating-point numbers are represented with 32 bits. The values for X and Y will be

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Q. A low memory can be connected to 8085 by using

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Q. Suppose a processor does not have any stack pointer register. Which of the following statements is true?

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Q. A processor needs software interrupt to

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Q. A CPU has two modes-privileged and non-privileged. In order to change the mode from privileged to non-privileged

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Q. Which is the most appropriate match for the items in the first column with the items in the second column:

X. Indirect Addressing I. Array implementation
Y. Indexed Addressing II. Writing re-locatable code
Z. Base Register Addressing III. Passing array as parameter

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Q. The 2’s complement representation of (−539)10 in hexadecimal is

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Q. A device employing INTR line for device interrupt puts the CALL instruction on the data bus while

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Q. In 8085, which of the following modifies the program counter ?

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Q. The 2' s complement representation of the decimal value - 15 is

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Q. Sign extension is a step in

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Q. In 2' s complement addition, overflow

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Q. In the absolute addressing mode

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Q. What are the states of the Auxiliary Carry (AC) and Carry Flag (dCY) after executing the following 8085 program?

MVI L, 5DH
MVI L, 6BH
MOV A, H
ADD L

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Q. The performance of a pipelined processor suffers if

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Q. Horizontal microprogramming :

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Q. Assuming all numbers are in 2's complement representation, which of the following numbers is divisible by 11111011?

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Q. For a pipelined CPU with a single ALU, consider the following situations

1. The j + 1-st instruction uses the result of the j-th instruction
as an operand
2. The execution of a conditional jump instruction
3. The j-th and j + 1-st instructions require the ALU at the same
time

Which of the above can cause a hazard ?

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