Q.  Consider the following statements :

(a) Boolean expressions and logic networks correspond to labelled acyclic digraphs.
(b) Optimal Boolean expressions may not correspond to simplest networks.
(c) Choosing essential blocks first in a Karnaugh map and then greedily choosing the largest remaining blocks to cover may not give an optimal expression.
Which of these statement(s) is/ are correct

View solution

Q. Consider a full adder with the following input values :

(a) x=1, y=0 and Ci(carry input) = 0
(b) x=0, y=1 and Ci = 1
Compute the values of S(sum) and C0 (carry output) for the above input values.

View solution

Q. In the case of parallelization, Amdahl's law states that if P is the proportion of the program that can be made parallel and (1 - P) is the proportion that cannot be parallelized , then the maximum speed that can be achieved by using N processors is

View solution

Q. Which of the following statements is incorrect for Parallel Virtual Machine (PVM)?

View solution

Q. Which of the following is not valid with reference to Message Passing Interface (MPI) ?

View solution

Q. For the 8 - bit word 00111001, the check bits stored with it would be 0111. Suppose when the word is read from memory, the check bits are calculated to be 1101. What is the data word that was read from memory?

View solution

Q. Consider a 32 - bit microprocessor, with a 16 - bit external data bus, driven by an 8 MHz input clock. Assume that this microprocessor has a bus cycle whose minimum duration equals four input clock cycles. What is the maximum data transfer rate for this microprocessor?

View solution

Q. The RST 7 instruction in 8085 microprocessor is equivalent to :

View solution

Q. The CPU of a system having 1 MIPS execution rate needs 4 machine cycles on an average for executing an instruction. The fifty percent of the cycles use memory bus. A memory read/ write employs one machine cycle. For execution of the programs, the system utilizes 90 percent of the CPU time. For block data transfer, an IO device is attached to the system while CPU executes the background programs continuously. What is the maximum IO data transfer rate if programmed IO data transfer technique is used?

View solution

Q. The number of flip-flops required to design a modulo - 272 counter is :

View solution

Q. Consider a uniprocessor system where new processes arrive at an average of five processes per minute and each process needs an average of 6 seconds of service time. What will be the CPU utilization ?

View solution

Q. The advantage of _______ is that it can reference memory without paying the price of having a full memory address in the instruction.

View solution

Q. The output of a sequential circuit depends on

View solution

Q. Which of the following flip-flops is free from race condition ?

View solution

Q. Pipelining improves performance by:

View solution

Q. A multiplexer is a logic circuit that

View solution

Q. 8-bit 1’s complement form of –77.25 is

View solution

Q. ECL is the fastest of all logic families. High Speed in ECL is possible because transistors are used in difference amplifier configuration, in which they are never driven into ...............

View solution

Q. A binary 3-bit down counter uses J-K flip-flops, FFi with inputs Ji, Ki and outputs Qi, i=0,1,2 respectively. The minimized expression for the input from following, is

I. J0=K0=0
II. J0=K0=1
III. J1=K1=Q0
IV. J1=K1=Q'0
V. J2=K2=Q1Q0
Vl. J2=K2=Q'1Q'0

View solution

Q. Which of the following is an interrupt according to temporal relationship with system clock?

View solution