Q. When branches are being mis-predicted; hazard which is raised due to this issue, is known as

View solution

Q. Considering the following code: DIV.D F0,F2,F4; ADD.D F10,F0,F8; SUB.D F12,F8,F14, one statement that is true

View solution

Q. Branch predictors using the behavior of all other branches for making a prediction, are called

View solution

Q. Detection of loop stream r micro-fusion is performed by

View solution

Q. Branch-target buffer having a single variation for storing one or more target instructions instead, or in addition to the predicted

View solution

Q. Out-of-order execution of the program, tends to introduce the possibility of

View solution

Q. Three different types of dependences are

View solution

Q. The property of if a value of the executed instruction would be used by a coming instruction, is called

View solution

Q. The processor without the structural hazard is

View solution

Q. In the following instruction set DADD R1,R2,R3; DSUB R4,R1,R5; AND R6,R1,R7; OR R8,R1,R9; XOR R10,R1,R11, all the instructions after the DADD use the result of the

View solution

Q. If any instruction in A1, . . . , A4, D, M1, . . . , M7 has the same register destination as this instruction, then the possible solution is

View solution

Q. The simplest scheme to handle branches is to

View solution

Q. Splitting the cache into separate instruction and data caches or by using a set of buffers, usually called

View solution

Q. The ideal CPI (Cycle per instruction) on a pipelined processor is almost always

View solution

Q. With the separate adder and a branch decision made during ID, there is only a

View solution

Q. A stall is commonly called a

View solution

Q. The load instruction has a delay or latency that cannot be eliminated by forwarding, other technique used is

View solution

Q. If the event occurs at the same place every time the program is executed with the same data and memory allocation, then the event is known as

View solution

Q. Pipeline overhead arises from the combination of pipeline register delay and

View solution

Q. Each of the clock cycles from the previous section of execution, becomes a

View solution