Q. In the (0,2) branch predictor, having 4K entries, the bits are

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Q. A increasing scheme for the number of instructions, relative to the overhead and branch instructions is

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Q. Allowing multiple instructions for issuing in a clock cycle, is the goal of

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Q. For predicting the value which will be produced by an instruction, this stated technique is referred as

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Q. Attempts for predicting the result of a computation used technique, is called

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Q. In the scheme, named as Tomasulo

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Q. Computing the miss penalties, for every system, the formula which can be used is

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Q. The given instruction: L.D F0,0(R1), gets the state of execution in

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Q. If f0 is the array element then adding the scalar in F2, can be calculated as

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Q. When branches are being mis-predicted; hazard which is raised due to this issue, is known as

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Q. Considering the following code: DIV.D F0,F2,F4; ADD.D F10,F0,F8; SUB.D F12,F8,F14, one statement that is true

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Q. Branch predictors using the behavior of all other branches for making a prediction, are called

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Q. Detection of loop stream r micro-fusion is performed by

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Q. Branch-target buffer having a single variation for storing one or more target instructions instead, or in addition to the predicted

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Q. Out-of-order execution of the program, tends to introduce the possibility of

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Q. Three different types of dependences are

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Q. The property of if a value of the executed instruction would be used by a coming instruction, is called

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Q. The processor without the structural hazard is

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Q. In the following instruction set DADD R1,R2,R3; DSUB R4,R1,R5; AND R6,R1,R7; OR R8,R1,R9; XOR R10,R1,R11, all the instructions after the DADD use the result of the

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Q. If any instruction in A1, . . . , A4, D, M1, . . . , M7 has the same register destination as this instruction, then the possible solution is

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