Discussion Forum
Que. | An adder-subtractor single unit can be designed using full adder and |
a. | OR gates |
b. | XOR gates |
c. | NOR gates |
d. | NAND gates |
Answer:XOR gates |
Que. | An adder-subtractor single unit can be designed using full adder and |
a. | OR gates |
b. | XOR gates |
c. | NOR gates |
d. | NAND gates |
Answer:XOR gates |
Questions from Previous year GATE question papers
UGC NET Previous year questions and practice sets
UGC NET Previous year questions and practice sets
Attempt a small test to analyze your preparation level. This GATE exam includes questions from previous year GATE papers.
Practice test for UGC NET Computer Science Paper. The questions asked in this NET practice paper are from various previous year papers.