adplus-dvertising
frame-decoration

Question

With a NAND latch a low R and a low S produce a _____ condition.

a.

race

b.

set

c.

reset

d.

no change

Posted under Computer Architecture

Answer: (a).race

Engage with the Community - Add Your Comment

Confused About the Answer? Ask for Details Here.

Know the Explanation? Add it Here.

Q. With a NAND latch a low R and a low S produce a _____ condition.

Similar Questions

Discover Related MCQs

Q. The simplified form of the Boolean expression (X + Y + XY)(X + Z) is

Q. De Morgan's first theorem says that a NOR gate is equivalent to a bubbled _____ gate.

Q. A combinational logic circuit which is used when it is desired to send data from two or more source through a single transmission line is known as

Q. How many Flip-Flops are required for mod–16 counter?

Q. The digital logic family which has minimum power dissipation is

Q. Data can be changed from special code to temporal code by using

Q. A ring counter consisting of five Flip-Flops will have

Q. The speed of conversion is maximum in

Q. The gates required to build a half adder are

Q. If the input to T-flipflop is 100 Hz signal, the final output of the three T-flipflops in cascade is

Q. The device which changes from serial data to parallel data is

Q. A device which converts BCD to Seven Segment is called

Q. The access time of ROM using bipolar transistors is about

Q. The A/D converter whose conversion time is independent of the number of bits is

Q. A 4-bit synchronous counter uses flip-flops with propagation delay times of 15 ns each. The maximum possible time required for change of state will be

Q. Words having 8-bits are to be stored into computer memory. The number of lines required for writing into memory are

Q. In successive-approximation A/D converter, offset voltage equal to 1/2 LSB is added to the D/A converter’s output. This is done to

Q. How many flip flops are required to construct a decade counter

Q. Which TTL logic gate is used for wired ANDing

Q. The MSI chip 7474 is