Q. An adder-subtractor single unit can be designed using full adder and

View solution

Q. Which of the following is not a universal building block ?

View solution

Q. CARRY in half adder can be obtained using

View solution

Q. A NAND gate has inputs A and B. It's output is connected to the both of the inputs of another NAND gate. An equivalent gate for these two NAND gates is

View solution

Q. The operation which commutative but not associative is

View solution

Q. In which of the following gates, the output is 1 if and only if at least one input is 1?

View solution

Q. The inverter OR gate and AND gate are called decision-making elements because they can recognize some input _____ while disregarding others. A gate recognizes a word when its output is _____

View solution

Q. The functional difference between SR flip-flop and JK flip-flop is that

View solution

Q. With an RS latch a high S and low R sets the output to _____ ; a low S and a high R _____ the output to low.

View solution

Q. Flip-flop outputs are always

View solution

Q. A NOR gate has two or more input signals. All input must be _____ to get a high output.

View solution

Q. An inverter is also called a _____ gate.

View solution

Q. With a NAND latch a low R and a low S produce a _____ condition.

View solution

Q. The simplified form of the Boolean expression (X + Y + XY)(X + Z) is

View solution

Q. De Morgan's first theorem says that a NOR gate is equivalent to a bubbled _____ gate.

View solution

Q. A combinational logic circuit which is used when it is desired to send data from two or more source through a single transmission line is known as

View solution

Q. How many Flip-Flops are required for mod–16 counter?

View solution

Q. The digital logic family which has minimum power dissipation is

View solution

Q. Data can be changed from special code to temporal code by using

View solution

Q. A ring counter consisting of five Flip-Flops will have

View solution