Q. After a sequence of MMX instructions is executed, the MMX registers should be cleared by an instruction,

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Q. The number of pixels that can be manipulated in a single register by the CPU using MMX architecture is

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Q. After executing the floating point instructions, the floating point registers should be cleared by an instruction,

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Q. In the data type, packed byte, the number of bytes that can be packed into one 64-bit quantity is

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Q. Four words can be packed into 64-bit by using the data type,

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Q. The number of double words that can be packed into 64-bit register using packed double word is

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Q. The data type, “one quad word” packs __________ into 64-bit.

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Q. If the result of an operation is overflowed(exceeded than 16 bits) or underflowed then, only the lower 16-bits of the result are stored in the register and this effect is known as

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Q. In a multitasking operating system environment, each task should return to its own processor state which is

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Q. Which of the following exception generated by MMX is the same type of memory access exception as the X86 instructions?

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Q. When an MMX instruction is getting executed, the floating-point tag word is marked

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Q. In a preemptive multitasking O.S., the saving and restoring of FP and MMX states are performed by

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Q. The instruction of MMX that is essential when a floating-point routine calls an MMX routine or viceversa is

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Q. Pentium III is used in computers which run on the operating system of

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Q. The architecture of CPU of Pentium III is suitable for

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Q. The Pentium III has the operating frequencies as

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Q. The Pentium III consists of

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Q. The additional instructions that are designed especially for performing multimedia tasks are known as

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Q. The MMX instruction, EMMS consists of __________ on which it operates.

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Q. In all the MMX instructions, the destination operand resides in

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