Question
a.
Memory
b.
RAM
c.
Either in an MMX register or in memory
d.
MMX register
Posted under Microprocessor
Engage with the Community - Add Your Comment
Confused About the Answer? Ask for Details Here.
Know the Explanation? Add it Here.
Q. In all the MMX instructions, the destination operand resides in
Similar Questions
Discover Related MCQs
Q. For the MMX instructions, the prefix, P, is used to represent the mode of
View solution
Q. For the MMX instructions, the suffix, S, is used to represent
View solution
Q. The instruction that is used for quadword is
View solution
Q. The instruction, PSUBB, performs subtraction in
View solution
Q. The instruction, PCMPGT, is used to compare two data types and check
View solution
Q. The instruction that is not operated on quad word is
View solution
Q. When the instruction, PMULLW, is performed, then the lower order 16-bits of the 32 bit products are stored in
View solution
Q. When the instruction, PMULHW, is performed, then the higher order 16-bits of the 32 bit products are stored in
View solution
Q. The instruction in which both multiplication and addition are performed is
View solution
Q. If the result of PCMPEQ, which is a comparison of two packed data types, is a success, then the mask generated is
View solution
Q. The instructions that pass through the fetch, decode and execution stages sequentially is known as
View solution
Q. During the execution of instructions, if an instruction is executed, then next instruction is executed only when the data is read by
View solution
Q. Because of Pentium’s superscalar architecture, the number of instructions that are executed per clock cycle is
View solution
Q. The type of execution which means that the CPU should speculate which of the next instructions can be executed earlier is
View solution
Q. The execution in which the consecutive instruction execution in a sequential flow is hampered is
View solution
Q. A dual independent bus has
View solution
Q. The unit that is used to implement the multiple branch prediction in Pentium-Pro is
View solution
Q. Which of the following is not an independent engine of Pentium-Pro?
View solution
Q. The unit that accepts the sequence of instructions from the instruction cache as input is
View solution
Q. In fetch-decode unit, the number of parallel decoders that accept the stream of fetched instructions and decode them is
View solution
Suggested Topics
Are you eager to expand your knowledge beyond Microprocessor? We've curated a selection of related categories that you might find intriguing.
Click on the categories below to discover a wealth of MCQs and enrich your understanding of Computer Science. Happy exploring!
