Q. Which of the following pin when activated, allows address pipelining?

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Q. The signal that is used to insert WAIT states in a bus cycle in 80386 is

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Q. The signal which indicates to the CPU, to fetch a data word for the coprocessor is

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Q. The pipeline and dynamic bus sizing units handle

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Q. The 16-bit registers are available with their extended size of 32 bits, by adding the registers with a prefix of

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Q. In a 32-bit register, ESP, the lower 16-bits of the register can be represented by

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Q. Which of the following is a data segment register of 80386?

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Q. The register width used by the 32-bit addressing modes is

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Q. The flag that is additional in flag register of 80386, compared to that of 80286 is

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Q. The VM (virtual mode) flag is to be set, only when 80386 is in

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Q. In protected mode of 80386, the VM flag is set by using

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Q. During the instruction cycle of 80386, any debug fault can be ignored if

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Q. The RF is not automatically reset after the execution of

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Q. The segment descriptor register is used to store

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Q. The 32-bit control register, that is used to hold global machine status, independent of the executed task is

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Q. The descriptor table that the 80386 supports is

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Q. The registers that are together, known as system address registers are

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Q. Which of the following is a system segment register?

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Q. The test register(s) that is provided by 80386 for page caching is

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Q. Among eight debug registers, DR0-DR7, the registers that are reserved by Intel are

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