Q. The registers that store the keyboard and display modes and operations programmed by CPU are

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Q. The sensor RAM acts as 8-byte first-in-first-out RAM in

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Q. The registers that hold the address of the word currently being written by the CPU from the display RAM are

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Q. When a key is pressed, a debounce logic comes into operation in

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Q. The mode that is programmed using “end interrupt/error mode set command” is

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Q. When a key is pressed, the debounce circuit waits for 2 keyboard scans and then checks whether the key is still depressed in

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Q. The data that is entered from the left side of the display unit is of

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Q. The FIFO status word is used to indicate the error in

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Q. The flag that increments automatically after each read or write operation to the display RAM is

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Q. If any change in sensor value is detected at the end of a sensor matrix scan, then the IRQ line

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Q. Which of the following is not a mode of data transmission?

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Q. If the data is transmitted only in one direction over a single communication channel, then it is of

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Q. If the data transmission takes place in either direction, but at a time data may be transmitted only in one direction then, it is of

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Q. In 8251A, the pin that controls the rate at which the character is to be transmitted is

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Q. TXD(Transmitted Data Output) pin carries serial stream of the transmitted data bits along with

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Q. The signal that may be used either to interrupt the CPU or polled by the CPU is

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Q. The disadvantage of RS-232C is

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Q. The USB supports the signaling rate of

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Q. The bit packet that commands the device either to receive data or transmit data in transmission of USB asynchronous communication is

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Q. High speed USB devices neglect

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