adplus-dvertising
frame-decoration

Question

The INTR interrupt may be masked using the flag

a.

direction flag

b.

overflow flag

c.

interrupt flag

d.

overflow flag

Answer: (c).interrupt flag

Engage with the Community - Add Your Comment

Confused About the Answer? Ask for Details Here.

Know the Explanation? Add it Here.

Q. The INTR interrupt may be masked using the flag

Similar Questions

Discover Related MCQs

Q. If an interrupt is generated from outside the processor then it is an

Q. If the interrupt is generated by the execution of an interrupt instruction then it is

Q. Example of an external interrupt is

Q. Example of an internal interrupt is

Q. The interrupt request that is independent of IF flag is

Q. The type of the interrupt may be passed to the interrupt structure of CPU from

Q. During the execution of an interrupt, the data pushed into the stack is the content of

Q. After every response to the single step interrupt the flag that is cleared is

Q. At the end of ISR, the instruction should be

Q. When the CPU executes IRET,

Q. The interrupt for which the processor has the highest priority among all the external interrupts is

Q. The interrupt for which the processor has highest priority among all the internal interrupts is

Q. In case of string instructions, the NMI interrupt will be served only after

Q. The NMI pin should remain high for atleast

Q. The INTR signal can be masked by resetting the

Q. For the INTR signal, to be responded to in the next instruction cycle, it must go ________ in the last clock cycle of the current instruction.

Q. The status of the pending interrupts is checked at

Q. Once the processor responds to an INTR signal, the IF is automatically

Q. If the pin LOCK (active low based) is low at the trailing edge of the first ALE pulse, then till the start of the next machine cycle, the pin LOCK (active low) is

Q. With the trailing edge of the LOCK (active low), the INTA (active low) goes low and remains in it for