Q. A 4-stage pipeline has the stage delays as 150, 120, 160 and 140 nanoseconds respectively. Registers that are used between the stages have a delay of 5 nanoseconds each. Assuming constant clocking rate, the total time taken to process 1000 data items on this pipeline will be

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Q. Spatial locality refers to the problem that once a location is referenced

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Q. The Principle of locality justifies the use of

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Q. A system that has a lot of crashes, data should be written to the disk using?

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Q. Which addressing mode is suitable for a high-level language statement?

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Q. Which memory unit has the lowest access time?

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Q. In a 16-bit instruction code format 3-bit operation code, 12-bit address, and 1 bit is assigned for address mode designation. For indirect addressing, the mode bit is

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Q. A 32-bit address bus allows access to a memory of capability

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Q. Pipelining improves CPU performance due to?

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Q. The system bus consists of

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Q. An instruction cycle refers to

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Q. A hardware interrupt is

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Q. Which of the following is not involved in a memory write operation?

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Q. To prevent signals from colliding on the bus, ……………….. Prioritize access to memory by I/o channels and processors.

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Q. …………… improve system performance by temporarily storing data during transfers s/w devices or processers that operate at different speeds.

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Q. Addressing mode is …………………

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Q. Which of the following is not a valid class of interrupts?
1) Program
2) Timer
3) I/o
4) Hardware failure

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Q. System calls are usually invoked by using

1) An indirect jump
2) A software interrupt
3) Polling
4) A privileged instruction

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Q. Which of the following holds data and processing instructions temporarily until the CPU needs it??

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Q. Which of the following register processors used for fetch and execute operations?
1) Program counter
2) Instruction register
3) Address register

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