Q. Consider the following statements:

(i) Auto increment addressing mode is useful in creating self-relocating code.
(ii) If auto increment addressing mode is included in an instruction set architecture, then an additional ALU is required for effective address calculation.
(iii) In auto incrementing addressing mode, the amount of increment depends on the size of the data item accessed.
Which of the above statements is/are true?

View solution

Q. A computer uses a memory unit with 256 K words of 32 bits each. A binary instruction code is stored in one word of memory. The instruction has four parts: an indirect bit, an operation code and a register code part to specify one of 64 registers and an address part. How many bits are there in the operation code, the register code part and the address part?

View solution

Q. Consider the following x86 – assembly language instructions:

MOV AL, 153
NEG AL

The contents of the destination register AL (in 8-bit binary notation), the status of Carry Flag (CF) and Sign Flag (SF) after the execution of above instructions, are

View solution

Q. CMOS is a Computer Chip on the motherboard, which is:

View solution

Q. In RS flip-flop, the output of the flip-flop at time (t+1) is same as the output at time t, after the occurance of a clock pulse if:

View solution

Q. Match the terms in List - I with the options given in List - II :

List - I
(a) Decoder
(b) Multiplexer
(c) De multiplexer

List - II
(i) 1 line to 2^n lines
(ii) n lines to 2^n lines
(iii) 2^n lines to 1 line
(iv) 2^n lines to 2^(n−1) lines

Code:
(a) (b) (c)

View solution

Q. The hexadecimal equivalent of the binary integer number 110101101 is:

View solution

Q. Perform the following operation for the binary equivalent of the decimal numbers:

(−14)10 + (−15)10

The solution in 8 bit representation is:

View solution

Q. Match the items in List - I and List - II :

List - I
(a) Interrupts which can be delayed when a much highest priority interrupt has occurred
(b) Unplanned interrupts which occur while executing a program
(c) Source of interrupt is in phase with the system clock

List - II
(i) Normal
(ii) Synchronous
(iii) Maskable
(iv) Exception

Code:
(a) (b) (c)

View solution

Q. Which of the following mapping is not used for mapping process in cache memory?

View solution

Q. Simplify the following using K-map:

F (A, B, C, D) = Σ (0, 1, 2, 8, 9, 12, 13)
d (A, B, C, D) = Σ (10, 11, 14, 15)

d stands for don’t care condition.

View solution

Q. In 8085 microprocessor, what is the output of following program?

LDA 8000H
MVI B, 30H
ADD B
STA 8001H

View solution

Q. The Boolean function with the following Karnaugh map is :

View solution

Q. The Octal equivalent of the binary number 1011101011 is:

View solution

Q. In 8085 microprocessor which of the following flag(s) is (are) affected by an arithmetic operation?

View solution

Q. In 8085 microprocessor the address bus is of .................... bits.

View solution

Q. In the architecture of 8085 microprocessor match the following:

List - I
(a) Processing unit
(b) Instruction unit
(c) Storage and Interface unit

List - II
(i) Interrupt
(ii) General purpose Register
(iii) ALU
(iv) Timing and Control
Code :
(a) (b) (c)

View solution

Q. Which of the following addressing mode is best suited to access elements of an array of contiguous memory locations?

View solution

Q. Which of the following is correct statement?

View solution

Q. A micro-instruction format has micro-ops field which is divided into three subfields F1, F2, F3 each having seven distinct micro-operations, condition field CD for four status bits, branch field BR having four options used in conjunction with address field ADF. The address space is of 128 memory locations. The size of micro-instruction is:

View solution