Q. The correction to be applied in decimal adder to the generated sum is

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Q. Which of the following is the fastest logic

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Q. The digital logic family which has the lowest propagation delay time is

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Q. How many AND gates are required to realize Y = CD+EF+G

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Q. How many select lines will a 16 to 1 multiplexer will have

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Q. CMOS circuits consume power

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Q. The commercially available 8-input multiplexer integrated circuit in the TTL family is

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Q. CMOS circuits are extensively used for ON-chip computers mainly because of their extremely

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Q. Which of the following memories stores the most number of bits

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Q. Which of the following is the fastest logic?

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Q. Shifting a register content to left by one bit position is equivalent to

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Q. For JK flip flop with J=1, K=0, the output after clock pulse will be

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Q. The output of SR flip flop when S=1, R=0 is

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Q. The number of flip flops contained in IC 7490 is

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Q. How many two-input AND and OR gates are required to realize Y=CD+EF+G

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Q. When an input signal A=11001 is applied to a NOT gate serially, its output signal is

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Q. The result of adding hexadecimal number A6 to 3A is

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Q. A universal logic gate is one, which can be used to generate any logic function. Which of the following is a universal logic gate?

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Q. A full adder logic circuit will have

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Q. An eight stage ripple counter uses a flip-flop with propagation delay of 75 nanoseconds. The pulse width of the strobe is 50ns. The frequency of the input signal which can be used for proper operation of the counter is approximately

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