Q. The logical addresses generated by the CPU are mapped onto physical memory by ____.

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Q. Circuits that can hold their state as long as power is applied is _______.

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Q. The number of external connections required in 16 X 8 memory organisation is _____.

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Q. In a 4M-bit chip organisation has a total of 19 external connections.then it has _______ address if 8 data lines are there.

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Q. The reason for the implementation of the cache memory is

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Q. The effectiveness of the cache memory is based on the property of ________.

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Q. The correspondence between the main memory blocks and those in the cache is given by _________.

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Q. When two or more clock cycles are used to complete data transfer it is called as ________.

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Q. The drawback of building a large memory with DRAM is

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Q. The memory which is used to store the copy of data or instructions stored in larger memories, inside the CPU is called _______.

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Q. The memory address range to which RAM will respond

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Q. How many addresses are required for 25 x 40 video RAM ?

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Q. Four memory chips of 16 x 4 size have their address bases connected together. The system will be of size

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Q. Property of locality of reference may fail, if a program has

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Q. In a virtual memory system the address space specified by the address lines of the CPU must be -----------than the physical memory size and -----------than the secondary storage size.

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Q. Memory refreshing may be done

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Q. For the synchronization of the read head, we make use of a _______.

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Q. The method of placing the heads and the discs in an air tight environment is called as ______.

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Q. In memory interleaving, the lower order bits of the address is used to

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Q. Which of the following technique/s used to effectively utilize main memory ?

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