adplus-dvertising
frame-decoration

Question

When the compiler attempts to schedule instructions to avoid the hazard; this approach is called

a.

Compiler

b.

Static scheduling

c.

Dynamic scheduling

d.

Both a and b

Posted under Computer Architecture

Answer: (d).Both a and b

Engage with the Community - Add Your Comment

Confused About the Answer? Ask for Details Here.

Know the Explanation? Add it Here.

Q. When the compiler attempts to schedule instructions to avoid the hazard; this approach is called

Similar Questions

Discover Related MCQs

Q. Decoding is done in parallel with reading registers, which is possiblebecause the register specifiers are at a fixed location, the stated technique is called a

Q. Pipelining increases the CPU instruction

Q. Control hazards can cause a greater performance loss for MIPS pipeline than do

Q. The sum of the contents of the base register and the sign-extended offset is used as a memory address, the sum is known as

Q. The presence of antidependences and output dependences, leads to

Q. The process of letting an instruction move from the instruction decode stage into the execution stage of this pipeline is usually called

Q. To solve the problems with a simple hardware technique called forwarding, also known as

Q. Every MIPS instruction can be implemented in at most

Q. Code containing redundant loads, stores, and other operations that might be eliminated by an optimizer, is a

Q. Delays arising from the use of a load result 1 or 2 cycles after the loads, refers as

Q. Situations that prevent the next instruction in the instruction stream, from executing during its designated clock cycle are known as

Q. The simplest dynamic branch-prediction scheme is a

Q. When an instruction is guaranteed to complete, it is called

Q. An implementation technique whereby multiple instructions are overlapped in execution, refers to

Q. Grouping the 16 functional units together into four groups and supplying a set of buses, called

Q. Example: the number of cars per hour and is determined by how often a completed car exits the assembly line, shows the

Q. To improve the ability of the compiler to fill branch delay slots, most processors with conditional branches have introduced a

Q. Pipelining that allows to achieve higher clock rates by decomposing the five-stage integer pipeline into eight stages, is refered as

Q. When all instructions take the same number of cycles, which must also equal the number of pipeline stages the process is known as

Q. Exceptions that are caused by some hardware event that is not under the control of the user program, refered as