Q. Which of the following gates is known as coincidence detector ?

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Q. Which table shows the logical state of a digital circuit output for every possible combination of logical states in the inputs ?

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Q. A positive AND gate is also a negative

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Q. A demultiplexer is used to

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Q. An OR gate can be imagined as

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Q. Which combination of gates does not allow the implementation of an arbitrary Boolean function?

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Q. How many full adders are required to construct an m-bit parallel adder ?

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Q. Parallel adders are

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Q. The most efficient method followed by computers to multiply two unsigned numbers is _______ .

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Q. For the addition of large integers most of the systems make use of ______ .

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Q. In a normal n-bit adder , to find out if an overflow as occurred we make use of _____ .

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Q. In the implementation of a Multiplier circuit in the system we make use of _______ .

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Q. When 1101 is used to divide 100010010 the remainder is ______ .

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Q. The NAND gate output will be low if the two inputs are

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Q. The output of a logic gate is 1 when all its inputs are at logic 0. the gate is either

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Q. The correction to be applied in decimal adder to the generated sum is

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Q. Which of the following is the fastest logic

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Q. The digital logic family which has the lowest propagation delay time is

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Q. How many AND gates are required to realize Y = CD+EF+G

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Q. How many select lines will a 16 to 1 multiplexer will have

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