Q. Cached and interleaved memories are ways of speeding up memory access between CPU’s and slower RAM. Which memory models are best suited (i.e. improves the performance most) for which programs ?

(i) Cached memory is best suited for small loops.
(ii) Interleaved memory is best suited for small loops
(iii) Interleaved memory is best suited for large sequential code.
(iv) Cached memory is best suited for large sequential code.

View solution

Q. Which of the following logic families is well suited for high-speed operations ?

View solution

Q. A complete microcomputer system consists of

View solution

Q. Where does a computer add and compare data ?

View solution

Q. Pipelining strategy is called implement

View solution

Q. The concept of pipelining is most effective in improving performance if the tasks being performed in different stages :

View solution

Q. Identify the addressing modes of below instructions and match them :

(a) ADI (1) Immediate addressing
(b) STA (2) Direct addressing
(c) CMA (3) Implied addressing
(d) SUB (4) Register addressing

View solution

Q. Identify the devices given below with their IC numbers :

(i) USART                                 (a) 8251
(ii) Micro controller                (b) 8051
(iii) Interrupt controller         (c) 8259
(iv) DMA controller                 (d) 8257

      (i)   (ii)    (iii) (iv)

View solution

Q. On receiving an interrupt from an I/O device, the CPU

View solution

Q. Consider a logical address space of 8 pages of 1024 words mapped with memory of 32 frames. How many bits are there in the physical address?

View solution

Q. CPU does not perform the operation

View solution

Q. A chip having 150 gates will be classified as

View solution

Q. A latch is constructed using two cross-coupled

View solution

Q. An astable multivibrator has

View solution

Q. The register or main memory location which contains the effective address of the operand is known as

View solution

Q. Advantage of synchronous sequential circuits over asynchronous ones is

View solution

Q. What is the transitive voltage for the voltage input of a CMOS operating from 10V supply?

View solution

Q. The highest noise margin is offered by

View solution

Q. The characteristic equation of a JK flip flop is:

View solution

Q. In order to implement a n variable switching function, a MUX must have:

View solution