Q. The reason for which the RISC processor goes to idle state(or stall) is

View solution

Q. The instructions that instruct the processor to make a decision about the next instruction to be executed are

View solution

Q. When an instruction depends on the results of the previous instructions then

View solution

Q. Which of the following is not a stage of pipeline of a RISC processor?

View solution

Q. The register window is used to point the number of physical registers is

View solution

Q. The disadvantage of register windowing is

View solution

Q. Which of the following is true about register windowing?

View solution

Q. The RISC processors that support variable length instructions are from

View solution

Q. Which of the following is not true about RISC processors?

View solution

Q. The number of CPIs(Clock Per Instruction) for an instruction of RISC processors is

View solution

Q. The number of clockcycles that take to wait until the length of instruction is known in order to start decoding is

View solution

Q. The additional functionality that can be placed on the same chip of RISC is

View solution

Q. The advantage of RISC processors is

View solution

Q. In order to implement complex instructions, CISC architectures use

View solution

Q. Which of the following processor belongs to hybrid RISC-CISC architecture?

View solution

Q. Which of the following is an application of RISC architecture by adding more instructions?

View solution

Q. The feature of hybrid CISC-RISC architecture is

View solution

Q. The feature of RISC that is not present in CISC is

View solution

Q. The RISC architecture is preferred to CISC because RISC architecture has

View solution

Q. The disadvantage of CISC design processors is

View solution