Q. The intervals between the samples is obtained from

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Q. Comparator_A+ is controlled by which of the following peripheral registers?

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Q. CAON bit is used to

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Q. P2CA4-P2CA0 bits are used for

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Q. CAREFx bits are used for

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Q. Which of the following bits are not actually associated with the comparator module.

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Q. Flag CAIFG is raised,

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Q. Setting a bit in the Port Disable register CAPD causes the circuits for the usual digital input and output buffers to be disconnected from the appropriate pin.

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Q. Which bit is used for exchanging the two inputs of the comparator and invert its output to compensate?

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Q. Changes in Vcc changes the value of V+ ?

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Q. The relaxation oscillator circuit helps in

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Q. The successive approximation converters have resolution of

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Q. In SAR based conversions, each bit typically requires one clock cycle (sometimes two) to make a comparison and set up the new voltage.

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Q. The main operations that are basically performed in a SAR ADC are?

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Q. Usually a capacitor is inserted between an analog input and the ground because

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Q. ADC10 and ADC12 are

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Q. ADC10 needs external capacitors on its voltage reference.

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Q. ADC10CTL0 and ADC10CTL1 are registers

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Q. While conversion is in progress, which of the flag is affected.

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Q. ADC10SHTx bits allow_________cycles of the ADC10CLK.

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