Q. Which architecture is followed by general purpose microprocessors?

View solution

Q. Which architecture involves both the volatile and the non volatile memory?

View solution

Q. Which architecture provides separate buses for program and data memory?

View solution

Q. Which micro controller don’t match with its architecture below?

View solution

Q. Harvard architecture allows:

View solution

Q. Which out of the following supports Harvard architecture?

View solution

Q. Why most of the DSPs use Harvard architecture?

View solution

Q. Which of the following supports CISC as well as Harvard architecture?

View solution

Q. Which of the two architecture saves memory?

View solution

Q. Is the following instruction correct LDI R3,50?

View solution

Q. Registers R0-R31 are used for what type of works?

View solution

Q. Largest value that can be loaded in an 8 bit register is?

View solution

Q. The total space for the data memory available in the AVR based micro controller is?

View solution

Q. Which out of the following instructions don’t affect the flags of the status register?

View solution

Q. What is the difference between the two given instructions?
LDI R16,0x34 and LDI R16,$34

View solution

Q. Which out of the following is not a directive?

View solution

Q. Is an assembly language a high level language?

View solution

Q. A 14 bit program counter can execute a maximum of _________ memory locations?

View solution

Q. When AVR wakes up, then the value of PC becomes?

View solution

Q. Which of the following is correct about BRNE instruction in avr microcontrollers?

View solution