Q. The physical-address that is coming to the cache is further divided into field/s:

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Q. If the cache is not able for containing all the blocks needed while execution, the miss is then known as

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Q. When the victim buffer is totally full, the cache must

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Q. 10% stores and 26% loads instruction for MIPS programs, to make writes

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Q. Larger blocks increases the conflict-misses and the capacity-misses, whenever the cache is

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Q. The page table level that says if page has been modified, is known as

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Q. Data structure, maintaining the addresses of physical-pages, typically takes the form of a

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Q. The matching tag sends the corresponding physical address through effectively a

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Q. For Reducing Miss Rate, using Large blocks', the given statement defines

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Q. Equivalent to the PTE valid bit, used to indicate the valid translation is refered to as

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Q. When the processor gets the requested data items from the cache, it is called a

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Q. To provide for protected sharing, half of the address space is shared by all processes and half is unique to each process, called

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Q. The processor's performance can be calculated as

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Q. At any instant it is possible to switch from one process to another, this exchange is called a

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Q. Caches containing either instructions or data, is referred to the term

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Q. Hardware solutions for the synonym problems, are called

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Q. Fixed-size blocks known as pages, and those having variable-size blocks are known as

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Q. If the entry is 8 bytes long, each page table has 512 entries, and the Opteron has 4 KB pages. Each of the four level fields are 9 bits long, and the page offset is 12 bits, then the sign extended would be

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Q. If going fully associative, refers to the

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Q. The natural policy uses for the memory hierarchies: L1 data of cache are always present in L2 level of cache, refers to

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