Q. To come out of idle mode, the external interrupt that is enabled is

View solution

Q. The state of signals in idle mode is

View solution

Q. The power control register is

View solution

Q. The mode that offers the most secured parity enabled data communication at lower baud rates is

View solution

Q. In mode 2, the baud rate depends only on

View solution

Q. If the microcontroller is expected to communicate in a multiprocessor system, then the required condition is

View solution

Q. If SM0=1, SM1=0, then the transceiver selected is

View solution

Q. During serial reception, the buffer that receives serial bits and converts to a byte is

View solution

Q. The common unit shared by the receiver unit and transmission unit of serial communication unit is

View solution

Q. The transmission unit does not require assistance from processor if once a byte for transmission is written to

View solution

Q. The task of converting the byte into serial form and transmitting it bit by bit along with start, stop and parity bits is carried out by

View solution

Q. The number of bits transmitted or received per second is defined as

View solution

Q. The mcs 51 architecture supports

View solution

Q. The serial communication is used for

View solution

Q. The serial communication is

View solution

Q. The service to an interrupt will be delayed if it appears during the execution of

View solution

Q. For an interrupt to be guaranteed served it should have duration of

View solution

Q. If two interrupts, of higher priority and lower priority occur simultaneously, then the service provided is for

View solution

Q. The minimum duration of the active low interrupt pulse for being sensed without being lost must be

View solution

Q. The priority level of an interrupt of 8051 for which SI(serial interrupt) interrupt is programmed is

View solution