Q. The stack segment register contains

View solution

Q. PUSH operation

View solution

Q. POP operation

View solution

Q. The register or memory location that is pushed into the stack at the end must be

View solution

Q. In the instruction,

ASSUME CS : CODE, DS : DATA, SS : STACK

The ASSUME directive directs to the assembler the

View solution

Q. When a stack segment is initialised then

View solution

Q. The number of PUSH instructions and POP instructions in a subroutine must be

View solution

Q. 8086 does not support

View solution

Q. For 8086 microprocessor, the stack segment may have a memory block of a maximum of

View solution

Q. While CPU is executing a program, an interrupt exists then it

View solution

Q. An interrupt breaks the execution of instructions and diverts its execution to

View solution

Q. While executing the main program, if two or more interrupts occur, then the sequence of appearance of interrupts is called

View solution

Q. Whenever a number of devices interrupt a CPU at a time, and if the processor is able to handle them properly, it is said to have

View solution

Q. NMI stands for

View solution

Q. If any interrupt request given to an input pin cannot be disabled by any means then the input pin is called

View solution

Q. The INTR interrupt may be

View solution

Q. The Programmable interrupt controller is required to

View solution

Q. The INTR interrupt may be masked using the flag

View solution

Q. If an interrupt is generated from outside the processor then it is an

View solution

Q. If the interrupt is generated by the execution of an interrupt instruction then it is

View solution