Q. Which mode offers the banking of memory in the DRAM interfacing technique?

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Q. Which of the following has a fast page mode RAM?

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Q. Which mode reduces the need for fast static RAMs?

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Q. Which of the following is also known as hyper page mode enabled DRAM?

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Q. What does BEDO DRAM stand for?

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Q. Which of the following is more quickly accessed?

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Q. Which factor determines the effectiveness of cache?

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Q. Which of the following determines a high hit rate of the cache memory?

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Q. Which of the following is a common cache?

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Q. Which factor determines the number of cache entries?

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Q. What is the size of the cache for an 8086 processor?

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Q. How many possibilities of mapping does a direct mapped cache have?

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Q. Which of the following allows speculative execution?

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Q. Which of the following refers to the number of consecutive bytes which are associated with each cache entry?

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Q. Which factor determines the cache performance?

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Q. What are the basic elements required for cache operation?

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Q. How many divisions are possible in the cache memory based on the tag or index address?

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Q. Which of the following cache has a separate comparator for each entry?

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Q. What type of cache is used in the Intel 80486DX?

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Q. Which of the following has a separate cache for the data and instructions?

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