Q. Which level is an in-built nonmaskable interrupt in SPARC processor?

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Q. How many instructions does SPARC processor have?

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Q. What is generated by an external interrupt in SPARC?

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Q. When an external interrupt is generated, what type of mode does the processor supports?

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Q. Where is trap vector table located in SPARC processor?

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Q. How many bits does SPARC-V9 processor have?

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Q. What are the three modules in SPARC processor?

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Q. How many floating point register does the FPU of the SPARC have?

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Q. Which module of SPARC contains the general purpose registers?

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Q. What shows the brightness of the pixel in a digital signal processor?

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Q. What is the color format of chrominance in a digital signal processor?

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Q. Which of the following processor are designed to perform calculations in graphics rendering?

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Q. Which of the processor is a good match for applications such as video games?

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Q. Which of the following statement is true for concurrency?

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Q. Which is an imperative language?

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Q. Which of the following instructions supports parallel execution?

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Q. Who invented VLIW architecture?

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Q. What is ILP?

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Q. Which ILP supports the ALU division?

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Q. Which is a vector processor?

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