Q. The address bus of any microprocessor is always

View solution

Q. A bus connected between the CPU and main memory that permits transfer of information between main memory and the CPU is known as

View solution

Q. In a microprocessor system, suppose. TRAP, HOLD, RESET Pin got activated at the same time, while the processor was executing some instructions, then it will first respond to

View solution

Q. When CPU is not fully loaded, which of the following method of data transfer is preferred

View solution

Q. In microprocessor, the SS is called as ________.

View solution

Q. The index register are used to hold _______.

View solution

Q. The BIU contains FIFO register of size __________ bytes.

View solution

Q. The BIU pre-fetches the instruction from memory and store them in ________.

View solution

Q. The CS register stores instruction _____________ in code segment.

View solution

Q. The microprocessor determines whether the specified condition exists or not by testing the ______.

View solution

Q. The _________ translates a byte from one code to another code.

View solution

Q. The BIU contains FIFO register of size 6 bytes called _____.

View solution

Q. The pin of minimum mode AD0-AD15 has ____________ address.

View solution

Q. The pin of minimum mode AD0- AD15 has _________ data bus.

View solution

Q. Bits in IRR interrupt are ______.

View solution

Q. __________ generate interrupt signal to microprocessor and receive acknowledge.

View solution

Q. The _______ pin is used to select direct command word.

View solution

Q. BURST refresh in DRAM is also called as ___________.

View solution

Q. For the most Static RAM the maximum access time is about ____________.

View solution

Q. Which of the following statements on DRAM are correct?

- Page mode read operation is faster than RAS read.
- RAS input remains active during column address strobe.
- The row and column addresses are strobed into the internal buffers using RAS and CAS inputs respectively

View solution