Question
a.
enable
b.
disable
c.
running
d.
None
Posted under Digital Logic Design
Engage with the Community - Add Your Comment
Confused About the Answer? Ask for Details Here.
Know the Explanation? Add it Here.
Q. IF E=0 in Up-down counter with Enable mode it means that the counter is
Similar Questions
Discover Related MCQs
Q. 7404 is a
View solution
Q. Decimal digit in BCD can be represented by
View solution
Q. To start the game in lamp handball the start switch start the at the
View solution
Q. SR latch is made up of two cross coupled
View solution
Q. In the design procedure first step is to
View solution
Q. IC of 7 segment display contains
View solution
Q. Integrated circuit number 7493 can be connected to count from?
View solution
Q. Integrated circuit number 74161 has
View solution
Q. Integrated circuit number 74155 has
View solution
Q. When Memory enabled (ME) is equal to 1 than it is
View solution
Q. Number of gates for the full adder can be reduced if JK flip-flop is used for
View solution
Q. Input clock of RS flip-flop is given to
View solution
Q. 74195 shifter register has
View solution
Q. ROM simulator is obtained from RAM when it is operated in the
View solution
Q. 7410 is the
View solution
Q. Counters that transfer invalid states to valid states are called
View solution
Q. In BCD, the number 1010 has
View solution
Q. 74151 IC consists of
View solution
Q. Up down counters decremented by
View solution
Q. Bidirectional shift registers shifts
View solution
Suggested Topics
Are you eager to expand your knowledge beyond Digital Logic Design? We've curated a selection of related categories that you might find intriguing.
Click on the categories below to discover a wealth of MCQs and enrich your understanding of Computer Science. Happy exploring!
