Question
a.
storing the carry
b.
subtracting the carry
c.
both a and b
d.
None
Posted under DLD Lab Equipment and Experiments Digital Logic Design
Engage with the Community - Add Your Comment
Confused About the Answer? Ask for Details Here.
Know the Explanation? Add it Here.
Q. Number of gates for the full adder can be reduced if JK flip-flop is used for
Similar Questions
Discover Related MCQs
Q. Input clock of RS flip-flop is given to
View solution
Q. 74195 shifter register has
View solution
Q. ROM simulator is obtained from RAM when it is operated in the
View solution
Q. 7410 is the
View solution
Q. Counters that transfer invalid states to valid states are called
View solution
Q. In BCD, the number 1010 has
View solution
Q. 74151 IC consists of
View solution
Q. Up down counters decremented by
View solution
Q. Bidirectional shift registers shifts
View solution
Q. Integrated circuit number 74157 consists of
View solution
Q. When the control of shift register labeled as SH/LD =1, its means that the register is
View solution
Q. D flip-flop is a circuit having
View solution
Q. Shift register whose serial input is connected to some function of selected registers output is called as
View solution
Q. For reading operation on RAM, there should be
View solution
Q. 4 bit gray code can be converted into
View solution
Q. Gray to binary conversion can be implemented with
View solution
Q. Half adder adds two numbers of
View solution
Q. Lamp handball game uses application of
View solution
Q. When clear input of flip-flops goes to 0 the flip-flops become
View solution
Q. Parity checker is used for
View solution
Suggested Topics
Are you eager to expand your knowledge beyond Digital Logic Design? We've curated a selection of related categories that you might find intriguing.
Click on the categories below to discover a wealth of MCQs and enrich your understanding of Computer Science. Happy exploring!
